Correlation between the diffusive and electrical barrier properties of the interface in polysilicon contacted n<sup>+</sup>-p junctions

Stork, J.M.C.; Arienzo, M.; Wong, C. Y.

doi:10.1109/t-ed.1985.22194

Cited by 47 publications

(13 citation statements)

References 10 publications

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“…5) suggests that arsenic doped emitters are sensitive to the interface while boron doped emitters are not. This is supported by the work of several previous researchers [4,15,16].…”

Section: Sit Timesupporting

confidence: 74%

“…In comparing figure 4 to Phosphorus figure 1, curve b, it can be seen that with increasing time, the interfacial oxide at v loo the polysilicon/silicon interface is ' growing. The presence of this chemical -6 oxide acts as a barrier to carrier transport V 90 [15] in arsenic doped emitters causing the increase in contact resistivity. The relative insensitivity to sit time in phosphorus .…”

Section: Sit Timementioning

confidence: 99%

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Polysilicon/Silicon Interfaces: Effect of Processing Parameters on Physical and Electrical Properties

Srikrishna¹,

Moinpour²,

Landau³

1992

MRS Proc.

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An arsenic doped polysilicon emitter structure is widely used as an important technology for high speed BiPolar and BiCMOS VLSI devices. The electrical behavior of such emitters is dictated to a large degree by the structure of the polysilicon/silicon interface and the extent of any interfacial oxide. In particular the contact resistance of n+ and p+ diffused regions of the polysilicon is sensitive to the interfacial structure. The microstructure of the polysilicon, in addition to the interface, dictates the junction depth and electrical properties and is determined by the deposition conditions and subsequent doping and annealing processes. The interface itself is defined largely by the cleaning procedure and the initial stages of the deposition process. In this paper we report the effects of process variables, such as deposition temperature, doping and annealing times and temperatures and pre-cleans on the microstructure and electrical properties of poly-emitters.

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“…5) suggests that arsenic doped emitters are sensitive to the interface while boron doped emitters are not. This is supported by the work of several previous researchers [4,15,16].…”

Section: Sit Timesupporting

confidence: 74%

Section: Sit Timementioning

confidence: 99%

Polysilicon/Silicon Interfaces: Effect of Processing Parameters on Physical and Electrical Properties

Srikrishna¹,

Moinpour²,

Landau³

1992

MRS Proc.

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“…6 shows the Gummel plots for a high gain transistor and a nonyielding transistor. If the interface oxide becomes too thick, the arsenic cannot penetrate into the monosilicon for the 900°C anneal and a leaky emittedbase junction is formed [7], [8]. Fig.…”

Section: A Interfacial Oxide Growthmentioning

confidence: 99%

Comparison of bipolar NPN polysilicon emitter interface formation at three different manufacturing sites

Doyle

Barrett

Lane

et al. 1992

IEEE Trans. Semicond. Manufact.

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High performance polysilicon emitter bipolar transistors have been observed to have significant repeatability and manufacturing problems due to the inhomogeneous nature of the emitter and, particularly, the polysilicon-single crystal interface. For the first time, this paper examines the formation of polysilicon emitters at three different fabrication facilities, with a view to understanding critical manufacturing steps. This work demonstrates the effects of different interface procedures on the formation of the native oxide interfaces and how the transistor electrical properties are affected. The sensitivity of the interface break up, by rapid thermal annealing, to the initial interface thickness is quantified. Significantly, polysilicon emitter transistors from the three processes are compared, and it is found that the devices with recrystallized polysilicon behave as ideal single crystal transistors.

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“…In polysilicon emitter contacts, an interfacial oxide layer is invariably present at the polysilicon/ silicon interface, which has the advantage of increasing the current gain [2], [3] but the disadvantage of increasing the emitter resistance of the transistor [4]- [7]. A considerable amount of work has been published in the literature on the effects of the interfacial oxide on the base current [8]- [11] and emitter resistance [4]- [7], [12], [13] of polysilicon emitter contacts. It has been found that the nature of the interfacial oxide is significantly influenced by a number of factors, including the type of ex-situ clean (typically an HF etch) used prior to polysilicon deposition [9], [14], the polysilicon deposition conditions [15], [16], and the subsequent annealing conditions [8].…”

Section: Introductionmentioning

confidence: 99%

Impact of ex-situ and in-situ cleans on the performance of bipolar transistors with low thermal budget in-situ phosphorus-doped polysilicon emitter contacts

Rahim

Marsh

Ashburn

et al. 2001

IEEE Trans. Electron Devices

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Abstract-This paper investigates the effects of an in-situ hydrogen bake and an ex-situ hydroflouric acid (HF) etch prior to polysilicon deposition on the electrical characteristics of bipolar transistors fabricated with low thermal budget in-situ phosphorusdoped polysilicon emitter contacts. Emitter contact deposition in a UHV-compatible low pressure chemical vapor deposition (LPCVD) cluster tool is also compared with deposition in a LPCVD furnace. Transmission electron microscopy (TEM) and secondary ion mass spectroscopy (SIMS) are used to characterize the emitter contact material and the interface structure and a comparison is made with Gummel plots and emitter resistances on bipolar transistors. The SIMS results show that an in-situ hydrogen bake in a cluster tool gives an extremely low oxygen dose at the interface of 6.3 10 13 cm 2 , compared with 7.7 10 14 and 2.9 10 15 cm 2 for an ex-situ HF etch and deposition in a cluster tool or a LPCVD furnace, respectively. TEM shows that the in-situ hydrogen bake results in single-crystal silicon with a high density of defects, including dislocations and twins. The ex-situ HF etch gives polycrystalline silicon for deposition in both a cluster tool and a LPCVD furnace. The single-crystal silicon emitter contact has an extremely low emitter resistance of 21 m 2 in spite of the high defect density and the light emitter anneal of 30 s at 900 C. This compares with emitter resistances of 151 and 260 m 2 for the polycrystalline silicon contacts produced using an ex-situ HF etch and deposition in a cluster tool or a LPCVD furnace, respectively. These values of emitter resistance correlate well with the interface oxygen doses and the structure of the interfacial oxide layer. The high defect density in the single-crystal silicon is considered to be due to the high concentration of phosphorus ( 5 10 19 cm 3 ) in the as-deposited layers.Index Terms-Bipolar transistor, cluster tool, in-situ doped polysilicon, polycrystalline silicon, polysilicon, polysilicon emitter.

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Correlation between the diffusive and electrical barrier properties of the interface in polysilicon contacted n⁺-p junctions

Cited by 47 publications

References 10 publications

Polysilicon/Silicon Interfaces: Effect of Processing Parameters on Physical and Electrical Properties

Polysilicon/Silicon Interfaces: Effect of Processing Parameters on Physical and Electrical Properties

Comparison of bipolar NPN polysilicon emitter interface formation at three different manufacturing sites

Impact of ex-situ and in-situ cleans on the performance of bipolar transistors with low thermal budget in-situ phosphorus-doped polysilicon emitter contacts

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Correlation between the diffusive and electrical barrier properties of the interface in polysilicon contacted n+-p junctions

Cited by 47 publications

References 10 publications

Polysilicon/Silicon Interfaces: Effect of Processing Parameters on Physical and Electrical Properties

Polysilicon/Silicon Interfaces: Effect of Processing Parameters on Physical and Electrical Properties

Comparison of bipolar NPN polysilicon emitter interface formation at three different manufacturing sites

Impact of ex-situ and in-situ cleans on the performance of bipolar transistors with low thermal budget in-situ phosphorus-doped polysilicon emitter contacts

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Correlation between the diffusive and electrical barrier properties of the interface in polysilicon contacted n⁺-p junctions