Core Allocation and Relocation Management for a Self Dynamically Reconfigurable Architecture

Morandi, M.; Novati, M.; Santambrogio, Marco D.; Sciuto, D.

doi:10.1109/isvlsi.2008.39

Cited by 15 publications

(12 citation statements)

References 8 publications

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“…In the system implementation phase, besides the standalone DPRS architecture, the OS4RS design was integrated into the DPRS design methodologies [12,26]. Thus, reconfigurable hardware functions are executed as software applications that can be dynamically created and removed.…”

Section: Related Workmentioning

confidence: 99%

“…The MPC methodology proposes two basic wrapper designs with different standard interfaces such that any digital hardware design following the standard can be transformed into dynamically switchable by interfacing with the wrappers. Further, reconfigurable hardware functions were managed as conventional hardware devices in most of the OS4RS design [12,26], and thus the utilization of reconfigurable hardware functions is still limited. To further enhance the utilization of reconfigurable hardware functions, the MPC methodology proposes a hardware virtualization mechanism that enables the virtualization of a reconfigurable hardware function to support more than two software applications.…”

Section: Related Workmentioning

confidence: 99%

“…For example, RC6 and CRC32 both have 32-bit I/O interfaces, and thus can be configured for hardware virtualization. Table 2 shows the system resource usage, including the logic usage, the number of device nodes, and the number of kernel modules, using a conventional embedded system, existing reconfigurable systems [12,26], and a reconfigurable system with hardware virtualization mechanism, respectively. To support the transfer of encrypted real-time images on a network, all seven hardware functions must be configured at design-time in a conventional embedded system.…”

Section: Os4rs Design Using Hardware Virtualization Mechanismmentioning

confidence: 99%

“…To support the transfer of encrypted real-time images on a network, all seven hardware functions must be configured at design-time in a conventional embedded system. Existing reconfigurable systems [12,26] and the proposed reconfigurable system with hardware virtualization mechanism both require logic resources for the PRRs only as the PRRs can be reconfigured into different hardware functions at run-time for fitting different system requirements. However, reconfigurable hardware functions are still managed as conventional hardware devices in the existing reconfigurable systems [12,26], and the full set of seven device nodes and seven kernel modules are required for the network security reconfigurable systems.…”

Section: Os4rs Design Using Hardware Virtualization Mechanismmentioning

confidence: 99%

“…Existing reconfigurable systems [12,26] and the proposed reconfigurable system with hardware virtualization mechanism both require logic resources for the PRRs only as the PRRs can be reconfigured into different hardware functions at run-time for fitting different system requirements. However, reconfigurable hardware functions are still managed as conventional hardware devices in the existing reconfigurable systems [12,26], and the full set of seven device nodes and seven kernel modules are required for the network security reconfigurable systems. Through the hardware virtualization mechanism, our OS4RS allows the system to work for all seven reconfigurable hardware functions using only two device nodes and two kernel modules, instead of seven as in the existing nodes.…”

Section: Os4rs Design Using Hardware Virtualization Mechanismmentioning

confidence: 99%

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Model-based platform-specific co-design methodology for dynamically partially reconfigurable systems with hardware virtualization and preemption

Huang

Hsiung

Shen

2010

Journal of Systems Architecture

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To facilitate the development of the dynamically partially reconfigurable system (DPRS), we propose a model-based platform-specific co-design (MPC) methodology for DPRS with hardware virtualization and preemption. For DPRS analysis and validation, a model-based verification and estimation framework is proposed to make model-driven architecture (MDA) more realistic and applicable to the DPRS design. Considering inherent characteristics of DPRS and real-time system requirements, a semi-automatic model translator converts the UML models of DPRS into timed automata models with transition urgency semantics for model checking. Furthermore, a UMLbased hardware/software co-design platform (UCoP) can support the direct interaction between the UML models and the real hardware architecture. Compared to the existing estimation methods, UCoP can provide accurate and efficient platform-specific verification and estimation. We also propose a hierarchical design that consists of a hardware virtualization mechanism for dynamically linking the device nodes, kernel modules, and on-demand reconfigurable hardware functions and a hardware preemption mechanism for further increasing the utilization of hardware resources per unit time. Further, we realize a dynamically partially reconfigurable network security system (DPRNSS) to show the applicability and practicability of the MPC methodology. The DPRNSS can not only dynamically adapt some of its hardware functions at run-time to meet different system requirements, but also * Corresponding author: Tel.: Preprint submitted to Journal of Systems Architecture August 13, 2010 determine which mechanism will be used. Our experiments also demonstrate that the hardware virtualization mechanism can save the overall system execution time up to 12.8% and the hardware preemption mechanism can reduce up to 41.3% of the time required by reconfiguration-based methods.

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Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Section: Os4rs Design Using Hardware Virtualization Mechanismmentioning

confidence: 99%

Section: Os4rs Design Using Hardware Virtualization Mechanismmentioning

confidence: 99%

Section: Os4rs Design Using Hardware Virtualization Mechanismmentioning

confidence: 99%

See 3 more Smart Citations

Model-based platform-specific co-design methodology for dynamically partially reconfigurable systems with hardware virtualization and preemption

Huang

Hsiung

Shen

2010

Journal of Systems Architecture

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Formal framework for specifying dynamic reconfiguration of adaptive systems

2013

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In the real-world, there are many types of software systems and software engineers always deal with changes. The value of large systems decreases significantly as the requirements and operational environment change over time. Modern software systems are expected to have dynamic reconfigurations to cope with failure and changes. Software adaptation techniques try to overcome the change problem by reconfiguration. In this study, at first, the authors present a formal framework to represent the whole system and then, build a mathematical model called 'adaptor' based on adaptation contract and system architecture. The adaptor is used to define automatic fit between two different components of the system. Finally, for specifying the whole adaptor system the authors will introduce adaptor network using synchronisation vectors.

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