Copy Propagation Optimizations for VLIW DSP Processors with Distributed Register Files

Abstract

Abstract. High-performance and low-power VLIW DSP processors are increasingly deployed on embedded devices to process video and multimedia applications. For reducing power and cost in designs of VLIW DSP processors, distributed register files and multi-bank register architectures are being adopted to eliminate the amount of read/write ports in register files. This presents new challenges for devising compiler optimization schemes for such architectures. In our research work, we address the compiler optimization issues for PAC architecture, which is a 5-way issue DSP processor with distributed register files. We show how to support an important class of compiler optimization problems, known as copy propagations, for such architecture. We illustrate that a naive deployment of copy propagations in embedded VLIW DSP processors with distributed register files might result in performance anomaly. In our proposed scheme, we derive a communication cost model by cluster distance, register port pressures, and the movement type of register sets. This cost model is used to guide the data flow analysis for supporting copy propagations over PAC architecture. Experimental results show that our schemes are effective to prevent performance anomaly with copy propagations over embedded VLIW DSP processors with distributed files.

Achieving spilling-friendly register file assignment for highly distributed register files

“…For architectures with general-purpose and floating-point registers only, Lu et al presented a method (named idle register exploitation) exploiting idle register classes by static cost-benefit analysis to reduce the number of memory operations issued by spilling [14]. For the architectures with various register files, Wu et al proposed a method using the register files in spilling and reducing the memory communication costs [15]. These previous methods have attempted to use register files to reduce spilling in register allocation.…”

“…The SPIFR method was implemented to assist register file assignment, such as ping-pong-aware local favorable local register file assignment [6,7]. Since one of the major foundations of the SPIFR method is that the register allocator is capable of using register files for spilling, the register file spilling method [15] is applied to meet this requirement. The method determines a destination-which could be memory or a register file-by estimating the communication cost and pressure of every reachable register file, if a live range requires spilling.…”

“…Also, the complicated communication makes it desirable to use register file assignment in handling communications, including localconscious global register file assignment [11,12], ping-pong-aware local favorable local register file assignment [6,7], and simulated-annealing local register file assignment [13]. In addition to register file assignment, the copy propagation in the original Open64 compiler has also been improved [29]. Due to the distributed register file structure, conventional copy propagation might degrade the performance.…”

“…Since the communication costs of the latter are cheaper than those involving memory, register files represent an attractive alternative for spilling. Wu et al proposed a method using the register files in spilling and reducing the memory communication costs [15].…”

Enabling compiler flow for embedded VLIW DSP processors with distributed register files

“…It includes the work on partitioning register files to work with instruction scheduling [1], loop partitions for clustered register files [2], and global register allocations for cluster register files [3]. The work in [4] begins to address this complex optimization issue for embedded DSP processors, but only in the layer of copy propagation optimizations.…”