Control of Trenching and Surface Roughness in Deep Reactive Ion Etched 4H and 6H SiC

Abstract

An optimized deep reactive ion etching (DRIE) process for the fabrication of SiC microstructures has been developed. The optimized process enables the etching of 4H and 6H SiC to depths > 100 microns with the required characteristics of (1) high rate (>0.5 microns/min), (2) vertical sidewalls, (3) minimal microtrenching at the sidewall base, and (4) smooth etched surfaces. The optimized process was determined based on the results of an experiment (full factorial design) which determined how the etch characteristics are affected by four important process parameters: temperature of the wafer chuck, pressure within the chamber, and concentrations of O2 and Ar in a gas flow comprised of O2, Ar and SF6. This study is believed to be the first systematic investigation of the effect of temperature on SiC DRIE characteristics; substrate heating was found to be a key in producing the desired etch properties.

3C-SiC — From Electronic to MEMS Devices

“…This behavior was also observed by Jiang et al [90]. Beheim et al also observed an increase of the microtrenching effect in all processes where O 2 was incorporated [91]. This behavior was hypothesized by the formation of a SiF x O y layer that could have a greater tendency to charge than SiC.…”

Sputtering and amorphization of crystalline semiconductors by Nanodroplet Bombardment

“…When NB is applied to the surface of GaN with the ionic liquid Emi-Im at high acceleration voltages (up to 33.9 kV), yields of 25 atom/molecule and rates of 1745 nm/min can be obtained [44], surpassing the best rates of RIE systems (ß950 nm/min [8]). A full summary of the maximum sputtering yield and rates for different materials can be found in Table II. www.crt-journal.org (6 of 9) 1600240 Si [45] SiC [45] B 4 C [38] InAs [17] InP [17] Ge [45] GaAs [45] GaSb [17] GaN [44] Once more, the use of molecular dynamics analysis is fundamental to elucidate the mechanisms involved in the sputtering process. By modelling the impact of projectiles with diameters of 5, 10, 20, and 30 nm at velocities between 1 and 6 km/s on a [100] Si slab, three different mechanisms contributing to the sputtering are revealed: collision cascade, thermal sputtering, and hydrodynamic forces [23] (the last one only for projectiles with diameters and velocities larger or equal to 20 nm and 5.5 km/s).…”

“…When sputtering silicon, ionic liquids with high molecular mass (such as Emi-Im, Emi-BF 4 , TES, and TPP) sputter more atoms than formamide or EAN. The characteristic behavior of silicon when sputtered with Emi-Im seems to be replicated for these high molecular mass liquids [14]; both yield and surface roughness are correlated, and they peak for intermediate accelerating voltages to decrease suddenly.…”

Device Simulations on Novel High Channel Mobility 4H-SiC Trench MOSFETs and Their Fabrication Processes

“…The fabrication consisted of the following process sequence: Electron-beam evaporation of 100 nm of Cr, spin coating of 270 nm PMMA (950k 4%) on top of the hard mask, electron-beam writing of the trench test structures into the PMMA layer, PMMA development, selective opening of the Cr hard mask by a reactive ion-etching (RIE) process using a plasma consisting of a Cl 2 /O 2 gas mixture. As a starting point for the ICP dry-etching process a SF 6 -based standard recipe [21] has been used and optimized according to [22,23]. Our process is capable of etching high aspect ratio trenches into 4H-SiC with nearly vertical sidewalls and without trenching effects at the bottom of the trench (Fig.…”