Constrained interpolation for guided logic synthesis

Abstract

Abstract-Craig interpolation is a known method for expressing a target function f as a function of a given set of base functions G. The found interpolant represents the dependency function h, such that f = h(G). Generally, the set G contains enough base functions to enable the existence of multiple dependency functions whose quality mainly depends on the base functions selected for reconstruction. The interpolation is not an optimization problem and thus, often, it selects some random base functions and, particularly, omits others potentially required for an optimal implementation of the target function. Mainly, it is impossible to impose that the interpolant uses a specific base function.In this paper, we propose a method that forces a specific base function g i as a primary input of a dependency function. Such dependency function is build as a Shannon expansion of two constrained Craig interpolants for the assignments of the primary inputs for which g i evaluates to 0 and 1, respectively. We also introduce a method that iteratively imposes, one by one, a predefined set of base functions. In each iteration, we force a base function by generating a new dependency function used as a target function for the next iteration.We show that, unlike the standard Craig interpolation method, our carving method succeeds, with very high probability, to impose the desired base functions. It recomposes single-output logic circuits as their delay-or area-optimised implementations regardless of the input implementation. The proposed methods can be efficiently employed for rewriting circuits in some synthesis-based algorithms.

Analyzing the divide between FPGA academic and commercial results

“…VPR is used as place and route tool and a homogeneous LUT-only architecture at 48nm technology node as a target architecture. The MCNC benchmarks are still quite popular [12][13][14][15] and the VPR framework is still maintained as part of the VTR framework.…”