Configurable Two-Dimensional Linear Feedback Shifter Registers for Parallel and Serial Built-In Self-Test

An improved configurable 2-D linear feedback shift register for embedded core built-in self-test

“…These test sequences are used to detect the random pattern resistant faults and the random pattern detectable faults [6]. The control unit allows the switching of the outputs from different configuration arrays to appropriate cores.…”

“…The control unit will also direct the outputs of the flipflop array to the cores using the demultiplexer. To generate the test sequences with the minimum number of flip-flop stages, the following equation is used to obtain a minimum value of M [6].…”

“…A sample test pattern that generates test sequence for three embedded cores is shown in the Table I [6]. The sequences 1 to 6 will be given to first core, core1, sequences 7 to 12 to second core, core2, and the test sequences 13 to 16 to the third core, core3.…”

“…The sequences 1 to 6 will be given to first core, core1, sequences 7 to 12 to second core, core2, and the test sequences 13 to 16 to the third core, core3. Figure 4 shows the algorithm for the implementation of configurable 2D LFSR proposed by Chen and George in [6]. To implement the CNs for the test sequences in Table I, the M value is initially set to 1 and the initial value of the FFs is set to "101001" and the C i value is set to 0.…”

“…The resulting solution shown in Figure 5 has three configuration networks consisting of 14 gates (7 XOR2, 5 XOR3, 1 XOR4 and 1 XOR5) [6]. The output functions that are identical share the same gate.…”