Conductive Atomic Force Microscopy failure analysis for SOI devices

Abstract

A FIB shorting technique to create a conducting path across the buried oxide to connect active silicon to silicon substrate is demonstrated to allow Conductive Atomic Force Microscopy (CAFM) failure analysis on SOI devices. CAFM is carried out at via and contact levels to provide current images that helped to localize the faulty node and also determine currentvoltage characteristics at an area of interest.