Conduction mechanism of hydrogenated nanocrystalline silicon films

He, Yi; Hu, Gangyi; Yu, Mingbin; Liu, M.; Wang, J. L.; Xu, Guo‐Bo

doi:10.1103/physrevb.59.15352

Cited by 60 publications

(40 citation statements)

References 18 publications

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“…Therefore, nc-Si:H thin films are identified as an ideal material for application in electrical and photovoltaic devices such as tunnel diodes [8], emitting diodes [9], thin film transistors (TFTs) [10][11][12] and solar cells [1][2][3].…”

Section: Introductionmentioning

confidence: 99%

Influence of annealing on microstructure and piezoresistive properties of boron-doped hydrogenated nanocrystalline silicon thin films prepared by PECVD

Pan

Ding

Cheng

2015

J Mater Sci: Mater Electron

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Boron-doped hydrogenated nanocrystalline silicon (nc-Si:H) thin films were deposited by plasma enhanced chemical vapor deposition technique. Annealing treatment was performed on the deposited films at 400°C for 60 min in nitrogen atmosphere. Microstructure of the as-deposited and annealed films was characterized by X-ray diffraction (XRD) and Raman scatter spectra, surface morphology of these films was analyzed with atomic force microscopy (AFM), and piezoresistive properties of these films were evaluated by a four-point bending-based measurement system. The influence of annealing treatment on microstructure and piezoresistive properties of borondoped nc-Si:H thin films was comparatively studied. The Raman scatter spectra and XRD results together with AFM analysis results revealed that annealing treatment can increase the average grain size and crystalline volume fraction of boron-doped nc-Si:H thin films, and can alter grains distribution and concentration of the films. The piezoresistive property evaluation results showed that annealing treatment can increase the gauge factor of boron-doped ncSi:H thin films from 29.9 to 42.3. These results indicated that annealing treatment can act as an effective way to improve piezoresistive sensitivity of boron-doped nc-Si:H thin films. In this paper, the correlation between borondoped nc-Si:H thin films' piezoresistive properties and microstructure changes induced by annealing was discussed in detail.

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Section: Introductionmentioning

confidence: 99%

Influence of annealing on microstructure and piezoresistive properties of boron-doped hydrogenated nanocrystalline silicon thin films prepared by PECVD

Pan

Ding

Cheng

2015

J Mater Sci: Mater Electron

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“…Nevertheless, the combination of the AQD fabrication through PAM masks with the NQDs in nc-Si:H provides us an easy and practical way for the realization of nc-Si:H-based nanodevice arrays in a manner of true quantum size effects, since trivial modifications of the observed quantum phenomena [4][5][6] are expected in nc-Si:H systems due to the large size difference between the Si NQDs ($3-6 nm) and the artificial nc-Si:H nanodots (over 25 nm). In this paper, we report on the successful growth of highly ordered nc-Si:H nanodots on Si substrates for the application of nanodevice arrays by a plasma-enhanced chemical vapor deposition (PECVD) technique [4,10] through the PAM approach. The Si NQDs will play a key role in the quantum size effects, while the uniform ncSi:H AQDs establish the base for nc-Si:H nanodevice arrays with the spacing of the AQDs as a good electrical insulation.…”

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confidence: 99%

“…For nanodevices, however, another promising approach is the fabrication of highly ordered semiconductor nanodot arrays with the dot size down to tens of nanometers [7], which has been called artificial quantum dots (AQDs) [4,6]. For the growth methods, in comparison with the strain-induced Stranski-Kranstanov (SK) mode and lithography approach, utilization of the selforganized porous alumina membrane (PAM) as an evaporation or etching mask has several advantages in terms of its uniform nanopore size and spacing to neighbors and its ability to prepare fine structures with high throughout [7,8].…”

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confidence: 99%

“…In terms of hydrogenated nanocrystalline silicon (nc-Si:H) thin films, they are composed approximately of 50% nanocrystalline Si (mean grain size 3-6 nm) and 50% amorphous Si (a-Si) tissues in the interface regions (thickness about 2-3 atomic spacing) among the grains [4]. The small natural quantum dots (NQDs) of nano-scale Si grains allow us to observe zero-dimensional (0D) electronic states with macroscopic contacts at high temperature, as demonstrated by the appearance of Coulomb staircases in ultra-thin nc-Si/Si diodes [4] and nc-Si/a-SiO 2 systems [5]. Very recently, we have presented clear high temperature resonant tunneling through both the 0D and interfacial 2-D states in nc-Si:H/crystalline-Si (c-Si) NQD systems, based on the identification of confined lowdimensional carriers by magnetic-field-dependent Hall effect measurements [6].…”

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confidence: 99%

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Fabrication of highly ordered nanocrystalline Si:H nanodots for the application of nanodevice arrays

Ding¹,

Shen²,

Zheng³

et al. 2005

Journal of Crystal Growth

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“…7 Due to the small free concentration of carriers ͑with the intrinsic carrier concentration of Si͒ and also the small grain sizes, the crystalline regions within the intrinsic nc-Si grains will be fully depleted, inducing variations of the conduction band edge ͑E C0 ͒ from that in single crystal material. 9 In general, the trapping effects of the GB are related to its structure which is determined by a mutual misorientation of the neighboring crystalline grains. 7 When the film becomes very thin, the quantum confinement also becomes significant and has a strong dependence on the thickness, causing additional changes in E C0 , which can be approximated as 6…”

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confidence: 99%

Current percolation in ultrathin channel nanocrystalline silicon transistors

Guo

Silva

Ishii

2008

Applied Physics Letters

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The ultrathin channel nanocrystalline silicon transistor shows greatly improved switching performance and has demonstrated its candidacy for low power applications. In this work, by careful observation of the current-voltage and threshold voltage characteristics, we find that current percolation occurs when the channel is thinner than 3.0 nm due to strong quantum confinement induced large potential variations over the channel. We show that the device channel width must be at least 0.3 m to avoid percolative "pinch off" for 0.5 m channel length devices. Theoretical analysis performed on the devices agrees well with the experimental data and provides important guidelines to model and optimize the devices for circuit design. © 2008 American Institute of Physics. ͓DOI: 10.1063/1.2965807͔There has been significant interest in silicon nanostructures for electronics, photovoltaic, and optoelectronic applications, including zero-dimensional silicon nanocrystallites, one-dimensional ͑1D͒ quantum wires, and two-dimensional ͑2D͒ thin layers. 1-3 All these structures are designed to use the quantum confinement effect to enhance the device's performance. To design transistors for integrated electronics, however, the ideal structure must also be compatible with conventional silicon device processing. The 2D silicon layers appear to be the best choice for current fabrication techniques due to the planar geometry that is utilized in current complementary metal oxide semiconductor technology. Recently, by controlling the deposition ͑chemical vapor deposition͒ process at a very low deposition rate, ultrathin ͑Ͻ5 nm͒ flat nanocrystalline silicon ͑nc-Si͒ layers were achieved and applied as the channel for transistors in low power applications. 4 It is proven that using such an ultrathin channel effectively improves the switching performance of thinfilm transistors in nc-Si. 5 When the channel becomes thinner, the OFF-state leakage current I OFF decreases significantly, which is attributed to the stronger quantum confinement effect along the channel thickness direction. The subthreshold swing ͑S͒ also becomes steeper because the effect of gate voltage on the channel surface potential increases. Low I OFF and steep S result in a high I ON / I OFF ratio. 5 The high I ON / I OFF ratio will enable the transistors to be used to design integrated electronics on arbitrary substrates for the applications, where low power and fast access times are demanded.However, when the nc-Si layer becomes very thin, even the smallest thickness variation can result in highly random potential fluctuations due to the strong quantum confinement effect along the channel thickness direction, 6 and charge traps at grain boundaries ͑GBs͒ will also deplete the nc-Si grains of free carriers. 7 These will make the carrier transport from the source to the drain through the device channel become much more complicated, and result in electrical characteristics that may not be described by conventional fieldeffect transistor ͑FET͒ models. In the present study, current ...

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Conduction mechanism of hydrogenated nanocrystalline silicon films

Cited by 60 publications

References 18 publications

Influence of annealing on microstructure and piezoresistive properties of boron-doped hydrogenated nanocrystalline silicon thin films prepared by PECVD

Influence of annealing on microstructure and piezoresistive properties of boron-doped hydrogenated nanocrystalline silicon thin films prepared by PECVD

Fabrication of highly ordered nanocrystalline Si:H nanodots for the application of nanodevice arrays

Current percolation in ultrathin channel nanocrystalline silicon transistors

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