Computer determination of spaces of a broad-band nonuniform antenna array

Bratkovic, F.

doi:10.1109/tap.1973.1140511

Cited by 2 publications

(1 citation statement)

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“…Although the selection of the elements to be retained in the array has a great impact on the radiation pattern, there is no closed form solution for deriving the optimum set of elements for a specific array requirement. Therefore, various optimization algorithms [32]- [35] as well as random element placement techniques [36], [37] were investigated, which are mainly focused on keeping the peak or the average sidelobe level below the required limit while reducing the number of elements.…”

Section: Silicon Photonics Opa With a Sparse Aperturementioning

confidence: 99%

A Nonuniform Sparse 2-D Large-FOV Optical Phased Array With a Low-Power PWM Drive

Fatemi

Khachaturian

Hajimiri

2019

IEEE J. Solid-State Circuits

172

123

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Integrated optical phased arrays (OPAs) capable of adaptive beamforming and beam steering enable a wide range of applications. For many of these applications, a large scale 2-D OPA with full phase control for each radiating element is essential to achieve a functional low-cost solution. However, the scalability of such OPAs has been hampered by the optical feed distribution difficulties in a planar photonics process, as well as the high power consumption associated with having a large number of phase control units. In this paper, we present a two-chip solution low-power scalable OPA with a nonuniform sparse aperture, providing radiation pattern adjustment and feed distribution feasibility in a CMOS compatible silicon photonics process. The demonstrated OPA with a 128-element aperture achieves the highest reported grating-lobe-free field-of-view (FOV)-tobeamwidth ratio of 16 • /0.8 • , which is equivalent to a 484-element uniform array. This translates to at least 400 resolvable spots, 30 times more than the state-of-the-art 2-D OPAs. Moreover, by utilizing compact phase shifters in a row-column power delivery grid, we reduce the number of required drivers from 144 to 37. A high-swing pulsewidth modulation (PWM) driving circuit featuring breakdown voltage multipliers and soft turnon activation significantly reduces the power consumption of the system. The electronic driver chip and the integrated photonic chip are fabricated on a 65-nm CMOS process and a thick siliconon-insulator (SOI) silicon photonics process, occupying 1.7 mm 2 and 2.08 mm 2 of active area, respectively.

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