Computer-Aided Recoding to Create Structured and Analyzable System Models

Abstract

In embedded system design, the quality of the input model has a direct bearing on the effectiveness of the system exploration and synthesis tools. Given a well-written system model, tools today are effective in generating working implementations. However, readily available C reference code is not conducive for immediate system synthesis as it lacks needed features for automatic analysis and synthesis. Among others, the lack of proper structure and the presence of intractable pointers in the reference code are factors that seriously hamper the effectiveness of system design tools. To overcome these deficiencies, we aim to automate the conversion of flat C code into a wellstructured system model by applying automated source code transformations. We present a set of computer-aided recoding operations that enable the system designer to mitigate pointer problems and quickly create the necessary structural hierarchy so that the design model becomes easily analyzable and synthesizable. Utilizing the designer's knowledge, our interactive recoding transformations aid the designer in efficiently creating well-structured system models for rapid design space exploration and successful synthesis. Our estimated and measured experimental results show significant productivity gains through a substantial reduction of the model creation time.

Eliminating race conditions in system-level models by using parallel simulation infrastructure

“…With the help of statistics from a profiler, the designer can then identify suitable blocks in the application with high computational complexity for which parallelization is desirable and likely beneficial. 2) Restructure and recode the model: Through partitioning of functional blocks and encapsulating them into SLDL modules, the application is transformed into a systemlevel model with proper structure and hierarchy [2]. In particular, parallel execution is exposed explicitly.…”