Computation of the Area of Memristor Pinched Hysteresis Loop

Biolek, Zdeněk; Biolek, Dalibor; Biolková, Viera

doi:10.1109/tcsii.2012.2208670

Cited by 69 publications

(71 citation statements)

References 7 publications

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“…For A = 0, the aforementioned model is simplified into the well-known model of the HP memristor with linear dopant drift [6], that is, model of ideal memristor. Note that (7) does not correspond to any model of the currently known physically existing device.…”

Section: Simulationmentioning

confidence: 99%

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Variation of a classical fingerprint of ideal memristor

Biolek

Biolková

et al. 2015

Circuit Theory & Apps

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SUMMARYGradual disappearance of hysteresis with increasing frequency of the exciting signal is considered a classical fingerprint of general memristive systems. The paper analyzes a special version of this fingerprint, when the value of the charge delivered within the half-period remains constant while the frequency of the sinusoidal current is increasing. Under these conditions, the area of the pinched hysteresis loop of the ideal memristor increases with the square of the frequency. Breaking the rules of this fingerprint indicates reliably that the element analyzed is not an ideal memristor.

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Section: Simulationmentioning

confidence: 99%

“…It is proved in [6] that the following formula for the loop area holds for the sinusoidal excitation…”

Section: Introductionmentioning

confidence: 99%

Variation of a classical fingerprint of ideal memristor

Biolek

Biolková

et al. 2015

Circuit Theory & Apps

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“…From Property 6 in [2] we see that ( ) x t is inversely proportional to the excitation frequency ω . So, the area of the M Pinched hysteresis loop of a potassium ion-channel memristor for input voltage A=50mV, f=200 Hz.hysteresis lobe, which is a direct consequence of the state variable ( ) x t , is also inversely proportional to the it can be shown[9] that the pinched hysteresis loop is inscribed inside a triangle with two sides defined by the tangent line on the pinched loop at 0 t ω = and t ω π = , respectively, and with the third side defined by the vertical line tangent to the pinched loop at max i( t ) I = , as shown inFig. 2 (a)for the HP memristor.…”

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confidence: 93%

“…2 (a)for the HP memristor. The area of each lobe of the pinched loop is related to the area of the inscribing triangle[9], and the area of the inscribing triangle on the other hand is related to the difference in the slope of the pinched…”

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Fingerprints of a memristor

Sah

Adhikari²,

Kim

et al. 2014

2014 14th International Workshop on Cellular Nanoscale Networks and Their Applications (CNNA)

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In this paper, we present a device to be a memristor should exhibit three characteristic fingerprints: (a) Pinched hysteresis loop in the voltage v vs. current i plane, namely, the v-i loci always passes through origin for any bipolar periodic input voltage v(t). (b) Beyond a certain critical frequency ω*, the area of the pinched hysteresis lobe decreases monotonically as the frequency of the periodic input signal increases and (c) the shape of the pinched hysteresis loop varies with frequency f and shrinks to a single-valued function through the origin, as the frequency tends to infinity. Examples of memristors exhibiting these three fingerprints are presented.

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Theory and Technology of Memristive Devices

Tetzlaff

Ascoli

Wouters

2022

Wiley Encyclopedia of Electrical and Electronics Engineering

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CMOS scaling is progressively and inevitably approaching atomic boundaries. The industry is thus exploring the potential of novel disruptive nanotechnologies, based on multifunctional materials, which may allow the development of integrated circuits keeping the trend predicted by Moore in 1965 in the years to come, despite further transistor shrinking being no longer possible. Memristors, originally postulated only theoretically out of a brilliant line of thought by Chua in 1971 and identified at the nanoscale almost 40 years later, back in 2008, by a team of engineers supervised by R.S. Williams at Hewlett Packard Labs, represent the key nanotechnology of the future, enabling novel forms of computation, which are closer to the principles underlying the functionalities of the human brain, given the extraordinarily peculiar capability of these devices to sense, store, and process data in the same physical miniaturized volume. Achieving progress in memristor circuit design crucially calls for the development of synergies among researchers with different academic backgrounds. In fact, only combining the technical knowledge, acquired by memristor theoreticians, with the practical know‐how of experimenters will enable to foster progress in memristor circuit and system development in the near future. In line with this necessity, the present article is the fruit of a joint cooperation between two leading memristor research units from Germany, one based at TU Dresden, which has contributed to establish solid theoretical foundations on resistance switching memories and their circuits since 2008, and the other one based at RWTH Aachen University, which has been the leading experimental research unit on nanostructures of this kind over the same time span. This article first presents a comprehensive overview of the theory of memristors, starting off from the early achievements in the pioneering studies of their father Chua, then classifies and analyses in depth the main physical mechanisms underlying the inherently nonlinear behavior of their physical realizations, and, finally, discusses their most promising applications, from the development of new nonvolatile memories based on resistance switching phenomena to the realization of novel neuromorphic circuits, capable to mimic the complex dynamics of biological entities closer than conventional purely CMOS hardware, without leaving aside an excursus on the potential to leverage the unique features of these devices for the circuit implementation of unconventional brain‐inspired time‐ and energy‐efficient sensing and memcomputing strategies, which is a great appeal for the realization of portable light‐weight technical systems for the Internet‐of‐Things industry, especially but not only to the benefit of healthcare, well‐being, and automotive market sectors.

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Computation of the Area of Memristor Pinched Hysteresis Loop

Cited by 69 publications

References 7 publications

Variation of a classical fingerprint of ideal memristor

Variation of a classical fingerprint of ideal memristor

Fingerprints of a memristor

Theory and Technology of Memristive Devices

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