Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE), 2017 2017
DOI: 10.23919/date.2017.7927157
|View full text |Cite
|
Sign up to set email alerts
|

Compromising FPGA SoCs using malicious hardware blocks

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
2
1

Citation Types

0
7
0

Year Published

2017
2017
2023
2023

Publication Types

Select...
4
2
1

Relationship

0
7

Authors

Journals

citations
Cited by 15 publications
(8 citation statements)
references
References 8 publications
0
7
0
Order By: Relevance
“…Consequently, these systems are highly vulnerable to many inside-SoC physical attacks including SoC security corruption by using malicious IP/hardware, side-channel analysis, fault injection and covert channel. SoC security corruption attacks have been proposed first by Jacob et al [23] which showed how a malicious hardware IP can access processor core features and memory to bypass software or system security such as the secure boot. Then Benhani and Bossuet [6] evaluated the security of the ARM TrustZone technology in an FPGAbased SoC.…”
Section: B Attacks and Defenses On System On Chipsmentioning
confidence: 99%
“…Consequently, these systems are highly vulnerable to many inside-SoC physical attacks including SoC security corruption by using malicious IP/hardware, side-channel analysis, fault injection and covert channel. SoC security corruption attacks have been proposed first by Jacob et al [23] which showed how a malicious hardware IP can access processor core features and memory to bypass software or system security such as the secure boot. Then Benhani and Bossuet [6] evaluated the security of the ARM TrustZone technology in an FPGAbased SoC.…”
Section: B Attacks and Defenses On System On Chipsmentioning
confidence: 99%
“…To balance the system performance with the resource cost becomes increasingly important as it is able to significantly save the area‐time‐energy with the increasing number of IPs on SoC. Earlier works in this research area mainly focused on specific applications, such as [911] for designing SoCs with untrusted IPs, and [12, 13] for improving the system‐level performance in terms of design space and timing constraints.…”
Section: Related Workmentioning
confidence: 99%
“…Their proposed work reduces the performance penalty compared to a fully encrypted approach, however it is limited to the detection of attacks and does not provide countermeasures, other than freezing the system communication bus [22]. Jacob et al presented a detailed study of FPGA MPSoC security mechanisms with the focus on Hardware Trojans [13]. They proposed the concept of a light-weight AXI-wrapper as one of the prevention methods, similar to one proposed by [22], to encapsulate system assets.…”
Section: Related-workmentioning
confidence: 99%
“…The development of complex MPSoC based embedded solutions often involves the integration of third-party intellectual property (IP) to reduce time-to-market. The use of vulnerable third-party IP can open the door to attacks such as Hardware Trojans and malware, that can be launched within any device using the compromised IP [11], [12], [13]. Besides, the adaptation of thirdparty software components for ease of integration of network communication stacks, software libraries and services that were not designed primarily for machine-to-machine (M2M) devices pose serious security risks to the device when they are connected to a network or exposed to the Internet.…”
Section: Introductionmentioning
confidence: 99%