Comprehensive studies on the accuracy of trap characterization by using advanced random telegraph noise simulator

Abstract

Our developed noise simulator can represent the dynamic behaviors of electron and hole trapping and de-trapping via interactions with both the Si substrate and the poly-Si gate. Simulations reveal that the conventional analytical model using the ratio between the capture and emission time constants yields large errors in the estimates of trap site positions due to interactions with the Si substrate and poly-Si gate especially in thin gate insulator MOSFETs.

Grain-boundary-limited carrier mobility in polycrystalline silicon with negative temperature dependence: modeling carrier conduction through grain-boundary traps based on trap-assisted tunneling

“…In this report, we formulate carrier conduction through GB traps by utilizing the trapassisted tunneling (TAT) model. [9][10][11][12][13][14][15][16][17][18][19][20] We then show that our model reproduces the negative temperature dependence of GBlimited carrier mobility under steady-state conditions. This report is organized as follows.…”

“…23,24) Based on local lattice displacement and the stabilizing effect that it produces, quantum-mechanical perturbation theory has derived formulation of multi-phonon transition probabilities, 21) which is considered by the TAT model. Examples where the TAT model has been applied extend over various kinds of simulations, including those of ionization of deep semiconductor levels under high fields, 9) stress-induced leakage current (SILC), [10][11][12][13] random telegraph noise, [14][15][16][17][18][19] and metal-oxide-nitride-oxide-semiconductor structures. 20) According to Refs.…”

“…27. The third is the method utilizing simplified statistics 12,15,[17][18][19] for energies of tunneling carriers, which has been originally introduced by Ref. 10.…”

Random telegraph noise characteristic of nonvolatile resistive random access memories based on optical interference principle

“…10) In addition, RTN can be used not only to characterize the reliability of devices, but also to study the evolution behavior of internal defects in devices. 11,12) Based on the data extracted by Agilent Technologies B1500A, a physical interpretation model was established, which could calculate the average amplitude of the RTN. 13) Gradually, a 3D numerical model was developed to quantitatively describe the electron transport and temperature-dependent switching dynamics in the presence of fluctuation defects.…”

Effects of a dual spacer on electrical characteristics and random telegraph noise of gate-all-around silicon nanowire p-type metal–oxide–semiconductor field-effect transistors

“…The RTN is a small-frequency of noise in semiconductor devices; it affects the drain current due to the capture and emission of charge carriers in traps located at the interface of silicon (Si) channel and oxide. [9][10][11][12][13][14][15] Recent studies on the RTN induced by a SCT for planar MOSFETs, FinFETs, and GAA Si NW n-type MOSFETs have been reported. 9,16) Notably, electrical characteristics of MOSFETs can be boosted by using different technologies of spacers.…”