Comprehensive Optimization of Dual Threshold Independent-Gate FinFET and SRAM Cells

Abstract

Independent-Gate (IG) FinFET is a promising device in circuit applications due to its two separated gates, which can be used independently. In this paper, we proposed a comprehensive method to optimize the Dual Threshold (DT) IG FinFET devices by carrying out modulations for the gate electrode work function, oxide thickness, and silicon body thickness. Titanium nitride (TiNx) is used as the tunable work function gate electrode for good performances. The thicknesses of the gate oxide and silicon body are swept by TCAD simulations to obtain the appropriate values. The verification simulation of the optimized transistors shows that the DT IG FinFETs can realize merging parallel and series transistors, respectively, and the current characteristics of the transistors are improved significantly. By extracting the BSIM-IMG model parameters, we can simulate the circuits composed of the proposed DT IG FinFET by using HSPICE with BSIM-IMG model. As practical examples, we optimized two novel 7T SRAM cells using DT IG FinFETs. HSPICE simulation results indicate that the new SRAM cells obtain higher write margin and read static noise margin with lower leakage power consumption than the other implementations.

BDD-Based Topology Optimization for Low-Power DTIG FinFET Circuits

“…The synthesis tools, such as commercial tools like Synopsys Design Compiler (DC), public-domain tools like ABC [8], and synthesis algorithms like factorizationbased methods, usually utilizing these single-gate standard cell libraries to optimize the circuit topology. However, according to our research, DTIG FinFET-based circuits have excellent performances and can be used in modern VLSI circuits [9][10][11]. So it has an emerging need to develop a comprehensive method based on DTIG FinFETs.…”

“…Compared with single-gate devices, such as CMOS or CG FinFET, DTIG FinFET can design more flexible circuits by using of the low-threshold (low-V th ) and high-threshold (high-V th ) devices [2,3,9,11,20]. We have built a mini DTIG FinFET logic cells library for further using and as shown in Figure 1 are two examples and their CG comparisons.…”

An analytical model to assess DC characteristics of independent gate Si FinFETs

“…In order to find ψ 1 , Eqs. ( 12), ( 13), (14), and ( 16) are combined to get…”

“…Using MG-FinFETs, the width quantization effect on large circuits, such as SRAMs, can be reduced [11,12]. Also, in independent gate SRAMs, the dual gate system acts as a built-in feedback network and reduces read/write margins [13,14].…”

T-Channel Field Effect Transistor with Three Input Terminals (Ti-TcFET)

“…However, previous studies have shown that designing a circuit with devices with multiple input terminals is more flexible and efficient than using single-input ones [4,5]. The two-input low-threshold FinFET device proposed in the literature [6][7][8][9][10] is equivalent to two parallel transistors, while the two-input high-threshold FinFET device is equivalent to two series transistors. Therefore, the circuit can be simplified to reduce the transistor count by using two-input low-threshold and high-threshold FinFETs, thus reducing power consumption and the chip area.…”