Complete Register Allocation Problems

Sethi, Ravi

doi:10.1137/0204020

Cited by 147 publications

(25 citation statements)

References 9 publications

(9 reference statements)

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“…A possible reduction comes from the following NP-complete version of pebble game. It consists in deciding if a DAG can be pebbled with less than K pebbles where 1) pebbles can be placed on the node of the DAG only when all its predecessors are pebbled, 2) pebbles can be removed at any time and 3) nodes can be pebbled only once [15].…”

Section: Discussionmentioning

confidence: 99%

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List Scheduling in Embedded Systems under Memory Constraints

Arras

Fuin

Jeannot

et al. 2013

2013 25th International Symposium on Computer Architecture and High Performance Computing

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International audienceVideo decoding and image processing in embedded systems are subject to strong resource constraints, particularly in terms of memory. List-scheduling heuristics with static priorities (HEFT, SDC, etc.) being the oft-cited solutions due to both their good performance and their low complexity, we propose a method aimed at introducing the notion of memory into them. Moreover, we show that through appropriate adjustment of task priorities and judicious resort to insertion-based policy, speedups up to 20\% can be achieved. Lastly, we show that our technique allows to prevent deadlock and to substantially reduce the required memory footprint compared to classic list-scheduling heuristics.Le décodage vidéo et le traitement d'image dans les systèmes embarqués sont sujets à de fortes contraintes de ressources, particulièrement en termes de mémoire. Les heuristiques d'ordonnancement de liste à priorités statiques (HEFT, SDC,...) étant les solutions les plus souvent citées en raison à la fois de leurs bonnes performances et de leur faible complexité, nous proposons une méthode visant à y introduire la notion de mémoire. De plus, nous montrons que par le biais d'un ajustement adapté des priorités des tâches et d'un recours judicieux à l'insertion, des accélérations jusqu'à 20% peuvent être obtenues. Enfin, nous montrons que notre technique permet d'empêcher les interblocages et de réduire significativement l'empreinte mémoire requise comparé à des heuristiques d'ordonnancement de liste classiques

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Section: Discussionmentioning

confidence: 99%

“…Concerning memory constraints, preliminary work dates back to register allocation [15]. There also exists work for optimizing footprint for dataflow graphs [4] or for scheduling jobs in batch schedulers [2].…”

Section: Related Workmentioning

confidence: 99%

List Scheduling in Embedded Systems under Memory Constraints

Arras

Fuin

Jeannot

et al. 2013

2013 25th International Symposium on Computer Architecture and High Performance Computing

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“…The problem of evaluating a dag then becomes one of determining the minimal number of registers for computing the dag without stores. This problem has been shown to be NP-complete in [12].…”

Section: Multiregister Machinesmentioning

confidence: 98%

Code Generation for a One-Register Machine

Bruno

Sethi

1976

J. ACM

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ABSTTRAE~IL The majority of computers that have been built have performed all computations in devices called accumulators, or registers. In this paper, it is shown that the problem of generating minimal-length code for such machines is hard in a precise sense; specifically it is shown that the problem is NP-complete. The result is true even when the programs being translated are arithmetic expressions. Admittedly, the expressions in question can become complicated.KEY WORDS AND PHRASES: register allocation, straight line programs, basic blocks, arithmetic expressions, NP-complete, code optimization c~ CATEGORIES' 4.12, 5.25

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“…In the usual pebble game as defined in Section 3, pebbles are interchangeable (in other words vertices in the dag are assumed to take up approximately equal amounts of space). Minimization of the number of pebbles is known to be a hard problem [31].…”

Section: Pebble Games For Studying Use Of Global Storagementioning

confidence: 99%

The global storage needs of a subcomputation

Raoult

Sethi²

1984

Proceedings of the 11th ACM SIGACT-SIGPLAN Symposium on Principles of Programming Languages - POPL '84

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A defining characteristic of "functional" specifications is the absence of assignments: updates of tables and data structures are expressed by giving the relationship between the new and old values. An obvious implementation allocates separate space for new and old values and may consume a lot of storage. However, even when updates of attributes like symbol tables are expressed functionally, we would like to avoid making copies of the symbol table during attribute evaluation. In other words, if possible, the implementation should have a single global copy of the table that is updated using assignments. Since the value of the global copy changes during computation, the order of evaluation has to be chosen carefully. In this paper, we partition attributes into classes, the problem being to determine if there exists an evaluation order that allows each class to share a global storage area. The solution extends to handle symbol tables for block structured languages.More precisely, consider a directed acyclic graph D in which vertices represent attribute values to be computed. Associated with each vertex is a label indicating the storage area to be shared by the vertex. Storage used during the evaluation of D is studied by playing a pebble game on D with the following steps: (1) pebble (i.e. place a pebble) on a source; (2) pebble a vertex if all its successors have pebbles (a pebble may be moved to the vertex from one of its successors); (3) pick up a pebble. Each vertex must be pebbled exactly once. The use of global storage is formalized by defining single pebblings, in which at most one of the vertices with a given label has a pebble at any time. The results. also apply to a form of pebbling, called chain pebbling, that allows symbol tables for block structured languages to be studied.

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Complete Register Allocation Problems

Cited by 147 publications

References 9 publications

List Scheduling in Embedded Systems under Memory Constraints

List Scheduling in Embedded Systems under Memory Constraints

Code Generation for a One-Register Machine

The global storage needs of a subcomputation

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