Comparative study of low frequency noise and hot-carrier reliability in SiGe PD SOI pMOSFETs

Choi, Sang-Sik; Choi, A-Ram; Yang, J.; Hwang, Yong-Woo; Cho, Deok Ho; Shim, Kyu–Hwan

doi:10.1016/j.apsusc.2008.02.188

Cited by 2 publications

(1 citation statement)

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“…Therefore, our study on the degradation mechanism analysis for the optimization of Al/αTiO x /Al interfacial RRAM is a very valuable work. The result of the noise analysis can be direct evidence of the physical origin of the endurance failure because its characteristic is utilized to analyze the internal physics of electronics at the defect level [ 31 , 32 ].…”

Section: Introductionmentioning

confidence: 99%

Low-Frequency Noise-Based Mechanism Analysis of Endurance Degradation in Al/αTiOx/Al Resistive Random Access Memory Devices

2023

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In this work, we analyze a resistive switching random access memory (RRAM) device with the metal–insulator–metal structure of Al/αTiOx/Al. The transport mechanism of our RRAM device is trap-controlled space-charge limited conduction, which does not change during the endurance test. As the number of resistive switching (RS) cycles increases, the current in the low-resistance state (LRS) does not change significantly. In contrast, degradation in the high-resistance state (HRS) is noticeably evident. According to the RS cycle, the current shift fits well with the stretched-exponential equation. The normalized noise power spectral density (Si/I2) measured in the HRS is an order of magnitude higher than that in the LRS owing to the difference in the degree of trap occupancy, which is responsible for the transition of resistance states. During the consecutive RS, the Si/I2 in the HRS rapidly decreases for approximately 100 cycles and then saturates. In contrast, in the LRS, the Si/I2 does not change significantly. Here we propose a model associated with the endurance degradation of the experimental device, and the model is verified with a 1/f noise measurement.

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Section: Introductionmentioning

confidence: 99%