Comparative analysis of modified multilevel DC link inverter with conventional cascaded multilevel inverter fed induction motor drive

Poompavai, T.; Priya, P. Vijaya

doi:10.1016/j.egypro.2017.05.140

Cited by 12 publications

(6 citation statements)

References 14 publications

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“…For 7 level output voltage of MLI, the total time of one cycle is to be distributed for one cycle of 7 level output voltage as shown in Figure . 3. The total number of divisions per cycle and time interval of each division is given in ( 6) and (7).…”

Section: Logical Equations For Switching Schemementioning

confidence: 99%

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Analysis of Logic Gates for Generation of Switching Sequence in Symmetric and Asymmetric Reduced Switch Multilevel Inverter

Kumar

2019

IEEE Access

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Analysis of logic gates for the switching sequence operation of reduced switch multilevel inverter (MLI) is introduced in this paper. Two variants of MLI with reduced switches are considered for the analysis of the logic gates to obtain proper output voltage level. One MLI is with the symmetrical voltage, and the other is with the asymmetrical voltage. The analysis of the proposed logical operation is presented through the single-phase seven-level output voltage for both symmetrical and asymmetrical inverters. Input pulse pattern for the operation of the logic gates are chosen from the multi carrier pulse width modulation (PWM) techniques as phase disposition (PD), phase opposition disposition (POD), and alternate POD (APOD). The analysis for the generation of the required pulse pattern to operate the switches in MLI is presented as logical equations. The simulation work is performed and evaluated with the MATLAB/Simulink. The realtime simulation is performed for the required pulse pattern and generated with the support of dSPACE 1104. The THD comparative analysis is analyzed with a modulation index and various PWM methods.INDEX TERMS 5 switch module, 8 switch module, logic gates, multilevel inverter, pulse pattern, multi carrier sinusoidal pulse width modulation, total harmonic distortion.

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Section: Logical Equations For Switching Schemementioning

confidence: 99%

“…Analyzing the logic gates for the generation of the required pulse pattern is the major task of the MLI operation. Using the logic gates for the operation of various MLI's are not properly explained in many researchers work [7]- [16].…”

Section: Introductionmentioning

confidence: 99%

Analysis of Logic Gates for Generation of Switching Sequence in Symmetric and Asymmetric Reduced Switch Multilevel Inverter

Kumar

2019

IEEE Access

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“…Multilevel inverters (MLIs) provide the ultimate solution for the addressed issue and capable of delivering high power and medium voltage for industrial applications (Kurtoglu et al, 2019). Moreover, MLI extracts lesser input current functions both at the higher and lower switching frequency, gives lesser dv/dt effects in the load side, and also reduces filter needs that leads to avoiding stresses in bearings of a motor (Poompavai and Vijayapriya, 2017). As of now, many MLI topologies are available based on the mechanism of switching and depending on the input source voltage.…”

Section: Introductionmentioning

confidence: 99%

Investigation of Standalone Solar Photovoltaic Water Pumping System With Reduced Switch Multilevel Inverter

Poompavai

Kowsalya

2020

Front. Energy Res.

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Solar photovoltaic-powered water pumping systems are becoming very successful in regions where there is no opportunity for connecting the electric grid. The photovoltaic technology converts solar energy into electrical energy for operating direct current (DC) or alternating current (AC) motor-based water pump. In the case of a solar AC motor water pump, it engages two energy conversion stages (DC-DC and DC-AC) in the power conditioning unit. This usually resulted in increased size, cost, and complexity and decreases the efficiency of the entire system. The existing two-level inverter (DC-AC) stage generates higher harmonics in output voltage and higher electromagnetic interference that deteriorates directly the AC motor performance. Therefore, as a solution to the addressed problems, in this study, an innovative seven-level inverter with five power semiconductor switches for the operation of 0.5 HP single-phase induction motor pump had been investigated. The proposed multilevel inverter has the capability of providing lesser harmonic voltage that reduces filter requirements; along with this, other part components are used lesser when compared to other conventional multilevel inverters. To provide better insight into the work performance of this proposed topology, the simulation is executed in the MATLAB/Simulink environment, and hardware implementation of the same is depicted. From the results, it is observed that the proposed multilevel inverter topology obtained a total power loss of 1.6034 W and efficiency at 98.11%. This quality output voltage acquired from the multilevel inverter had been fed to drive the induction motor water pump; it pumped the water at the desired flow rate accordingly.

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“…The phase transformation was reported initially by S. P. Thompson in 1894 [6]. Of the total global electricity being consumed, motor system consumes about 43% to 46% and of which, Induction motor is preferred due to its robustness, more tolerant to faults, low cost, less maintenance and high speed [7][8][9][10]. In Industrial automation system, AC drives with adjustable speed system are also gaining popularity.…”

Section: Introductionmentioning

confidence: 99%

Performance analysis of packed U-cell based inverter-fed five-phase induction motor drive using SINPWM technique

Riyaz

Sadhu

Iqbal

et al. 2020

IJPEDS

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Induction motor is the backbone of current industrial applications. Multiphase machines can handle high power application easily. With the use of five-phase induction motor, advantage of both multi-phase and induction motor can be achieved. This paper presents analysis of five-phase seven level-based Induction motor system fed by packed U-cell based inverter. Modelling of five-phase induction motor is done with the help of mathematical equations using d-q axis transformation. Inverter voltage output comes to be approximately sinusoidal with 18.07% Total Harmonic Distortion (THD). Induction motor with specified parameters is simulated under no-load condition and attains steady state conditions after transient state.

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Comparative analysis of modified multilevel DC link inverter with conventional cascaded multilevel inverter fed induction motor drive

Cited by 12 publications

References 14 publications

Analysis of Logic Gates for Generation of Switching Sequence in Symmetric and Asymmetric Reduced Switch Multilevel Inverter

Analysis of Logic Gates for Generation of Switching Sequence in Symmetric and Asymmetric Reduced Switch Multilevel Inverter

Investigation of Standalone Solar Photovoltaic Water Pumping System With Reduced Switch Multilevel Inverter

Performance analysis of packed U-cell based inverter-fed five-phase induction motor drive using SINPWM technique

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