“…The optical power transfer function ( ) of the MZM is analyzed and given in Eq.(2). It is more accurate than those given in [4] [5], in which the authors didn't consider the device length dependent static and dynamic insertion loss introduced by the optical elements. The is plotted in Fig.3 for the MZM in a 130nm SOI CMOS process with different arm lengths.…”
An accurate methodology for analyzing the Mach-Zehnder modulator (MZM) based optical link power budget is presented. It optimizes the transceiver's system-level performance to meet the specifications of the optical links with N-level (N=2,4,8) pulse amplitude modulation format for high-speed signaling.
IntroductionSilicon-based photonic integration has emerged as a promising solution to meet the ever increasing transfer bandwidth requirement in the computing industry. Escalating the modulation format from PAM-2 to PAM-4, even to PAM-8 requires an analytic model to analyze the trade-off among the electrical-to-optical (EO) channel loss over the sacrificed signal-to-noise ratio, the circuits design complexity, the chip area and the power consumption [1]. MZM is by far the most reliable indirect optical modulator in silicon photonic platform, though its footprint is large and thus requires relatively more power from the drivers [2]. The extinction ratio (ER) of MZM at the transmitter (TX) side is determined by optical modulation amplitude (OMA), MZM's average output power ( ), the MZM device characteristic and the modulation scheme. An optimized optical link requires a suitable ER at the TX side to achieve a target receiver bit error rate (BER) performance with the least optical laser/electrical driver power consumption. Fig. 1 describes the proposed MZM-based photonic link power budget model. The key parameters of photonic devices, optical channel, and the specifications of the electrical driver and receiver circuitry are tabulated. By satisfying the boundary condition shown in Fig. 1, the model derives the power-optimized photonic parameters (e.g. laser power and MZM specs) according to the specified receiver specifications. This model is applicable to multiple-level pulse-amplitude modulation schemes.
“…The optical power transfer function ( ) of the MZM is analyzed and given in Eq.(2). It is more accurate than those given in [4] [5], in which the authors didn't consider the device length dependent static and dynamic insertion loss introduced by the optical elements. The is plotted in Fig.3 for the MZM in a 130nm SOI CMOS process with different arm lengths.…”
An accurate methodology for analyzing the Mach-Zehnder modulator (MZM) based optical link power budget is presented. It optimizes the transceiver's system-level performance to meet the specifications of the optical links with N-level (N=2,4,8) pulse amplitude modulation format for high-speed signaling.
IntroductionSilicon-based photonic integration has emerged as a promising solution to meet the ever increasing transfer bandwidth requirement in the computing industry. Escalating the modulation format from PAM-2 to PAM-4, even to PAM-8 requires an analytic model to analyze the trade-off among the electrical-to-optical (EO) channel loss over the sacrificed signal-to-noise ratio, the circuits design complexity, the chip area and the power consumption [1]. MZM is by far the most reliable indirect optical modulator in silicon photonic platform, though its footprint is large and thus requires relatively more power from the drivers [2]. The extinction ratio (ER) of MZM at the transmitter (TX) side is determined by optical modulation amplitude (OMA), MZM's average output power ( ), the MZM device characteristic and the modulation scheme. An optimized optical link requires a suitable ER at the TX side to achieve a target receiver bit error rate (BER) performance with the least optical laser/electrical driver power consumption. Fig. 1 describes the proposed MZM-based photonic link power budget model. The key parameters of photonic devices, optical channel, and the specifications of the electrical driver and receiver circuitry are tabulated. By satisfying the boundary condition shown in Fig. 1, the model derives the power-optimized photonic parameters (e.g. laser power and MZM specs) according to the specified receiver specifications. This model is applicable to multiple-level pulse-amplitude modulation schemes.
“…When the light source, typically at a wavelength of 1550 nm, is split evenly into the two arms, an electrical field forced by the reverse-biased voltage applied on each of the pn junction arms inducing a change in the carrier density, which, in turn induces a phase shift as the optical wave propagates in the MZM arm. When combining the two paths of light together, they interfere either constructively or destructively at the output, depending on the E-field applied on each of the MZM arms [5]. The optical power transfer function (T opt ) of the MZM can be derived as in (1).…”
Section: Twmzm Device Modelmentioning
confidence: 99%
“…This is achieved by an extra length (~100 μm) of waveguide for one of the arms before the split optical waves reach the phase modulators. A Verilog-A TWMZM model developed in our previous work [5] is used to capture the dynamic electro-optic effects between applied junction voltage and waveguide refractive index (RI) change. The model also includes the propagation delay of the light in the waveguide, RLGC network of the phase modulator and non-ideal effects of the optical loss and thermo-optical coefficient.…”
Section: Twmzm Device Modelmentioning
confidence: 99%
“…The model also includes the propagation delay of the light in the waveguide, RLGC network of the phase modulator and non-ideal effects of the optical loss and thermo-optical coefficient. Reader can refer to [5] for detailed formulas and parameters used in the Verilog-A model. Fig.…”
Section: Twmzm Device Modelmentioning
confidence: 99%
“…Packaging challenges involved with bonding of the silicon photonic and CMOS die are critical to the overall signal integrity performance and should be considered during the early design Manuscript received May 7, 2014 phase. This continuation of our previous work in [5] attempts to bridge the gap between silicon photonics and CMOS circuits by developing compact models for photonic devices, which are employed in circuit simulations to enable hybrid CMOS photonic system design.…”
Abstract-Systematic design and simulation methodology for hybrid optical transmitters that combine CMOS circuits in a 130 nm process, and a traveling-wave Mach-Zehnder modulator (TWMZM) in 130 nm SOI CMOS process, is presented. A compact Verilog-A model for the TWMZM is adopted for the electrooptical simulation. A bond wire model using a high-frequency solver is included for accurate package simulation. Transmitter post-layout simulation result exhibits 5.48 dB extinction ratio, 9.6 ps peak-to-peak jitter, and the best power efficiency of 5.81 pJ/bit when operating up to 12.5 Gb/s non-return-to-zero data. A pulse amplitude modulation 4-level transmitter with detailed linearity design procedure is presented which has horizontal and vertical eye opening of 49 ps and 203 μW when operating at 25 Gb/s, and the power efficiency is 5.09 pJ/bit.
Due to the rise of 5G, IoT, AI, and high-performance computing applications, datacenter traffic has grown at a compound annual growth rate of nearly 30%. Furthermore, nearly three-fourths of the datacenter traffic resides within datacenters. The conventional pluggable optics increases at a much slower rate than that of datacenter traffic. The gap between application requirements and the capability of conventional pluggable optics keeps increasing, a trend that is unsustainable. Co-packaged optics (CPO) is a disruptive approach to increasing the interconnecting bandwidth density and energy efficiency by dramatically shortening the electrical link length through advanced packaging and co-optimization of electronics and photonics. CPO is widely regarded as a promising solution for future datacenter interconnections, and silicon platform is the most promising platform for large-scale integration. Leading international companies (e.g., Intel, Broadcom and IBM) have heavily investigated in CPO technology, an inter-disciplinary research field that involves photonic devices, integrated circuits design, packaging, photonic device modeling, electronic-photonic co-simulation, applications, and standardization. This review aims to provide the readers a comprehensive overview of the state-of-the-art progress of CPO in silicon platform, identify the key challenges, and point out the potential solutions, hoping to encourage collaboration between different research fields to accelerate the development of CPO technology.
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