Compact Modeling and Design of Magneto-Electric Transistor Devices and Circuits

The electronic band structure of quasi-one-dimensional van der Waals semiconductors: the effective hole mass of ZrS3 compared to TiS3

“…Other semiconducting TMTs have received more limited attention, while TaS 3 [4,29,30] and ZrTe 3 [5], for example, are metallic. Higher Z value TMTs are expected to exhibit significant spin-orbit coupling [12,31] which is desirable for the next generation of spintronic devices [32][33][34][35]. For such devices, ZrS 3 and HfS 3 would be far more desirable, as the spin-orbit coupling is expected to be more significant than TiS 3 .…”

MERAM: Non-Volatile Cache Memory Based on Magneto-Electric FETs

“…Compared to a 200 ps coupling delay of the Magneto-Electric Magnetic Tunnel Junction (ME-MTJ) [20], MEFET achieves an extremely low switching delay (somewhere in the region of 10-100 ps [28], thus avoiding the excessive delays associated with exchange-coupled ferromagnets. Such device shows the feature of non-volatility due to the non-volatile AFM ordering of the ME and a very high and sharp turnon voltage due to the sharp turn on of the ME-switching [23]. It it worth pointing out that for sensing of device resistance, a more energy-efficient read circuitry could be expected for MEFET as it shows much higher ON/OFF ratio compared with TMR-sensing in traditional spin-based devices.…”

“…We consider two aspects in developing the MEFET model: First, ME control of the channel spin polarization based on the proximity induced polarization in the narrow 2D channel. Second, spin injection/detection function at the source/drain [16], [23]. The model is developed in Verilog-A with three distinct modules as shown in Fig.…”

“…• We enhance the experimentally-calibrated MEFET Verilog-A circuit model [23] to perform extensive analysis at the device, cell/array circuit levels. • We propose a 2-transistor 1-MEFET memory bit-cell circuit design with high speed and low read/write energy suitable for on-chip memory cache.…”

Direct measurements of proximity induced spin polarization in 2D systems

“…Two paths are available to address this limitation in silicon based CMOS transistors: (1) modifications to conventional CMOS schemes such as tunnel FETs [5][6][7][8][9][10][11] and two-dimensional (2D) FETs [4,6,8,[12][13][14][15][16][17][18][19] that address these short channel effects, and (2) developing alternative logic schemes including non-volatile [14, and non-binary [20-25, 31, 42, 47-51] devices. The field of spintronics, where the electron spin is manipulated and used to convey information, has provided some of the most promising alternative device structures such as magnetic tunnel junctions (MTJs) using spin-transfer torque [26][27][28][29][30], spinorbit torque [32][33][34][35][36], magneto-electrics [31, 37-40, 43, 45, 46], and multiferroics [21,[23][24][25][48][49][50]; anti-ferromagnetic spin-orbit read (AFSOR) logic [20,31,38,39]; and several variations of spin FETs [20,…”