Communication-aware branch and bound with cluster-based latency-constraint mapping technique on network-on-chip

Pang, Ke; Fresse, Virginie; Yao, Suying

doi:10.1007/s11227-016-1732-9

Cited by 4 publications

(4 citation statements)

References 26 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Initially, we compare the behavior (system QoS and computing time) of the proposed JDQT with: i) optimal approaches, i.e. Branch and Bound method (B&B) [36], [37] and Branch and Cut method (B&C) [38], which are known to provide optimal solution for the MILP problem -as far as we know no optimal algorithm exists for the problem formulation PP1 (20), ii) stochastic approaches (i.e. Genetic Algorithm (GA) [39]), and iii) heuristic (i.e., a two-step method that combines B&B and LP relaxation provided by Matlab optimization toolbox [40]).…”

Section: Simulation Resultsmentioning

confidence: 99%

Controllable QoS for Imprecise Computation Tasks on DVFS Multicores With Time and Energy Constraints

Kritikakou

Sentieys

2018

IEEE J. Emerg. Sel. Topics Circuits Syst.

View full text Add to dashboard Cite

Abstract-Multicore architectures have been used to enhance computing capabilities, but the energy consumption is still an important concern. Embedded application domains usually require less accurate, but always in-time, results. Imprecise Computation (IC) can be used to divide a task into a mandatory subtask providing a baseline QoS and an optional subtask that further increases the baseline QoS. This work aims at maximizing the system QoS by solving task mapping and DVFS for dependent IC-tasks under real-time and energy constraints. Compared with existing approaches, we consider the joint-design problem, where task-to-processor allocation, frequency-to-task assignment, task scheduling and task adjustment are optimized simultaneously. The joint-design problem is formulated as an N P-hard Mixed-Integer Non-Linear Programming and it is safely transformed to a MixedInteger Linear Programming (MILP) without performance degradation. Two methods (basic and accelerated version) are proposed to find the optimal solution to MILP problem. They are based on problem decomposition and provide a controllable way to tradeoff the quality of the solution and the computational complexity. The optimality of the proposed methods is proved rigorously, and the experimental results show reduced computation time (23.7% in average) compared with existing optimal methods.

show abstract

Section: Simulation Resultsmentioning

confidence: 99%

Controllable QoS for Imprecise Computation Tasks on DVFS Multicores With Time and Energy Constraints

Kritikakou

Sentieys

2018

IEEE J. Emerg. Sel. Topics Circuits Syst.

View full text Add to dashboard Cite

show abstract

“…Its maximal bandwidth can reach 62.94MByte/s. In the experiment, BBL algorithm [9] and XY routing algorithm are selected. The task graph of Multispectral imaging (MSIM) is given in Figure 3(a).…”

Section: Experiments and Discussesmentioning

confidence: 99%

Task Decomposition Exploration of Image Processing Applications on FPGA-Based NoC

Pang¹,

Fresse²,

Yao³

2017

dtcse

Self Cite

View full text Add to dashboard Cite

Abstract.As the key interconnection technique of System on Chip (SoC), Network on Chip (NoC) architecture is widely used in the high-throughput and low-latency image processing system designs. In addition to the bandwidth and latency, managing congestion resulted from imbalance network load is critical to improve the system performance. In this paper, one task decomposition exploration method on FPGA-based NoC is presented. According to different parallel properties of tasks of the application, subtask graphs are generated by taking advantage of different decomposition strategies. These subtask graphs are evaluated in timing latency and energy consumption based on FPGA-based NoC emulation platform. The experiments demonstrate that the proposed task decomposition exploration can help the designer select the most appropriate task decomposition scheme based on properties of the application to balance NoC net-work load and alleviate congestion.

show abstract

“…To have the best mapping solutions, using a multi-objective strategy is required (Sepúlveda et al, 2012). The aim of the majority of the topography procedures is to solve difficulties of mapping on homogeneous NoC (Bhulania et al, 2017;Huang et al, 2017;Pang et al, 2016). Depending on the time of the execution of task mapping, there exist two divisions for task mapping algorithms, namely, static and dynamic.…”

Section: Introductionmentioning

confidence: 99%

“…Depending on the time of the execution of task mapping, there exist two divisions for task mapping algorithms, namely, static and dynamic. The dynamic topography procedures have been conducted when application is being executed (Marcon et al, 2017;Pang et al, 2016). As in these kinds of procedures both the total system postponement and power usage are increased, the static mapping techniques are suggested (Pang et al, 2016).…”

Section: Introductionmentioning

confidence: 99%

Tasks mapping in the network on a chip using an improved optimization algorithm

Darbandi¹,

Ramtin

Sharafi

2020

IJPCC

View full text Add to dashboard Cite

Purpose A set of routers that are connected over communication channels can from network-on-chip (NoC). High performance, scalability, modularity and the ability to parallel the structure of the communications are some of its advantages. Because of the growing number of cores of NoC, their arrangement has got more valuable. The mapping action is done based on assigning different functional units to different nodes on the NoC, and the way it is done contains a significant effect on implementation and network power utilization. The NoC mapping issue is one of the NP-hard problems. Therefore, for achieving optimal or near-optimal answers, meta-heuristic algorithms are the perfect choices. The purpose of this paper is to design a novel procedure for mapping process cores for reducing communication delays and cost parameters. A multi-objective particle swarm optimization algorithm standing on crowding distance (MOPSO-CD) has been used for this purpose. Design/methodology/approach In the proposed approach, in which the two-dimensional mesh topology has been used as base construction, the mapping operation is divided into two stages as follows: allocating the tasks to suitable cores of intellectual property; and plotting the map of these cores in a specific tile on the platform of NoC. Findings The proposed method has dramatically improved the related problems and limitations of meta-heuristic algorithms. This algorithm performs better than the particle swarm optimization (PSO) and genetic algorithm in convergence to the Pareto, producing a proficiently divided collection of solving ways and the computational time. The results of the simulation also show that the delay parameter of the proposed method is 1.1 per cent better than the genetic algorithm and 0.5 per cent better than the PSO algorithm. Also, in the communication cost parameter, the proposed method has 2.7 per cent better action than a genetic algorithm and 0.16 per cent better action than the PSO algorithm. Originality/value As yet, the MOPSO-CD algorithm has not been used for solving the task mapping issue in the NoC.

show abstract

Communication-aware branch and bound with cluster-based latency-constraint mapping technique on network-on-chip

Cited by 4 publications

References 26 publications

Controllable QoS for Imprecise Computation Tasks on DVFS Multicores With Time and Energy Constraints

Controllable QoS for Imprecise Computation Tasks on DVFS Multicores With Time and Energy Constraints

Task Decomposition Exploration of Image Processing Applications on FPGA-Based NoC

Tasks mapping in the network on a chip using an improved optimization algorithm

Contact Info

Product

Resources

About