Communication-aware allocation and scheduling framework for stream-oriented multi-processor systems-on-chip

Ruggiero, Martino; Guerri, Alessio; Bertozzi, Davide; Poletti, Francesco; Milano, Michela

doi:10.1109/date.2006.243950

Cited by 64 publications

(36 citation statements)

References 26 publications

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“…Rong et al utilize integer linear programming for finding the optimal voltage schedule and task ordering for a system with a single core and peripheral devices [19]. In [21], the MPSoC scheduling problem is solved with the objectives of minimizing the data transfer on the bus and guaranteeing deadlines for the average case. Minimizing energy on MPSoCs using dynamic voltage scaling (DVS) has been formulated using a two-phase framework in [28].…”

Section: Related Workmentioning

confidence: 99%

Proactive temperature balancing for low cost thermal management in MPSoCs

Coskun¹,

Rosing²

2008

2008 IEEE/ACM International Conference on Computer-Aided Design

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Abstract-Designing thermal management strategies that reduce the impact of hot spots and on-die temperature variations at low performance cost is a very significant challenge for multiprocessor system-on-chips (MPSoCs). In this work, we present a proactive MPSoC thermal management approach, which predicts the future temperature and adjusts the job allocation on the MPSoC to minimize the impact of thermal hot spots and temperature variations without degrading performance. In addition, we implement and compare several reactive and proactive management strategies, and demonstrate that our proactive temperatureaware MPSoC job allocation technique is able to dramatically reduce the adverse effects of temperature at very low performance cost. We show experimental results using a simulator as well as an implementation on an UltraSPARC T1 system.

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Section: Related Workmentioning

confidence: 99%

Proactive temperature balancing for low cost thermal management in MPSoCs

Coskun¹,

Rosing²

2008

2008 IEEE/ACM International Conference on Computer-Aided Design

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“…An adaptation of the list scheduling heuristic has been proposed in [24] in the context of DSP processors. In [25,6] methods based on ILP/CP decomposition are used to find accurate solutions to mapping/scheduling problems. They take more realistic constraints into account but do not explore pipelining as we do.…”

Section: Discussionmentioning

confidence: 99%

Meeting Deadlines Cheaply

Legriel¹,

Maler²

2011

2011 23rd Euromicro Conference on Real-Time Systems

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We develop a computational framework for solving the problem of finding the cheapest configuration (in terms of the number of processors and their respective speeds) of a multiprocessor architecture on which a task graph can be scheduled within a given deadline. We then extend the problem in two orthogonal directions: taking communication volume into account and considering the case where a stream of instances of the task graph arrives periodically.

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“…Moreover, reads and writes on the same queue are linked from The way reading and writing activities are scheduled heavily depends on the task graph structure. If we restrict our analysis to pipelined task graphs (i.e., dependences among tasks are such that they are logically ordered in a pipeline, as in [2] and [8]), then input data reading activities can be considered tightly coupled with the computation activities of each task. Therefore, tasks writing their output data to shared memory just have their execution time increased by a quantity W CN W /f m , where W CN W is the number of clock cycles for writing data (it depends on the amount of data to write) between a task and its successor in the pipeline and f m is the frequency of the clock when task t is performed.…”

Section: B Subproblem Modelmentioning

confidence: 99%

Reducing the Abstraction and Optimality Gaps in the Allocation and Scheduling for Variable Voltage/Frequency MPSoC Platforms

Ruggiero

Bertozzi

Benini

et al. 2009

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-This paper proposes a novel approach to solve the allocation and scheduling problems for variable voltage/frequency multiprocessor systems-on-chip, which minimizes overall system energy dissipation. The optimality of derived system configurations is guaranteed, while the computation efficiency of the optimizer allows for solving problem instances that were traditionally considered beyond reach for exact solvers (optimality gap). Furthermore, this paper illustrates the development-and run-time software infrastructures that assist the user in developing applications and implementing optimizer solutions. The proposed approach guarantees a high level of power, performance, and constraint satisfaction predictability as from validation on the target platform, thus bridging the abstraction gap.

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Communication-aware allocation and scheduling framework for stream-oriented multi-processor systems-on-chip

Abstract: Abstract

Cited by 64 publications

References 26 publications

Proactive temperature balancing for low cost thermal management in MPSoCs

Proactive temperature balancing for low cost thermal management in MPSoCs

Meeting Deadlines Cheaply

Reducing the Abstraction and Optimality Gaps in the Allocation and Scheduling for Variable Voltage/Frequency MPSoC Platforms

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