Reducing the Abstraction and Optimality Gaps in the Allocation and Scheduling for Variable Voltage/Frequency MPSoC Platforms

Ruggiero, Martino; Bertozzi, Davide; Benini, Luca; Milano, Michela; Alexandru, Andrei

doi:10.1109/tcad.2009.2013536

Cited by 10 publications

(15 citation statements)

References 30 publications

(38 reference statements)

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“…varlist can_be_defined from temp (12) end (13) (14) feature suminsn (15) variable src1, src2 from temp (16) add src1,src2 to can_be_defined (17) variable dest from can_be_defined (18) remove dest from can_be_defined (19) ${dest} = ${src1} + ${src2}; (20) end (21) (22) feature cpinsn (23) variable src from temp (24) add src to can_be_defined (25) variable dest from can_be_defined (26) remove dest from can_be_defined (27) ${dest} = ${src}; (28) end ( backgroundDist. Depending on the sampled value, the filename from which the background is loaded varies.…”

Section: ${Createimage}mentioning

confidence: 99%

“…In many of these studies, the applications are modelled as a task graph in which nodes represent computations and edges represent dependence among these computations. Given a task graph, computations not on the critical path are slowed down using DVFS to save energy (e.g., [15][16][17][18]). Often, the proposed techniques are sensitive to the structure and properties of the task graph.…”

Section: ${Createimage}mentioning

confidence: 99%

See 1 more Smart Citation

A Language and Preprocessor for User-Controlled Generation of Synthetic Programs

Chiu

Garvey

Abdelrahman

2017

Scientific Programming

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We describe Genesis, a language for the generation of synthetic programs. The language allows users to annotate a template program to customize its code using statistical distributions and to generate program instances based on those distributions. This effectively allows users to generate programs whose characteristics vary in a statistically controlled fashion, thus improving upon existing program generators and alleviating the difficulties associated with ad hoc methods of program generation. We describe the language constructs, a prototype preprocessor for the language, and five case studies that show the ability of Genesis to express a range of programs. We evaluate the preprocessor's performance and the statistical quality of the samples it generates. We thereby show that Genesis is a useful tool that eases the expression and creation of large and diverse program sets.

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Section: ${Createimage}mentioning

confidence: 99%

Section: ${Createimage}mentioning

confidence: 99%

A Language and Preprocessor for User-Controlled Generation of Synthetic Programs

Chiu

Garvey

Abdelrahman

2017

Scientific Programming

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“…In offline solutions, static schedules are generated at design time and rely on worst-case execution time estimates to compute the DVFS and DPM actions used to scale the voltage and frequency and to switch on/off cores, respectively [10], [11], [18], [19]. Synchronous dataflow (SDF) and cyclo-static dataflow (CSDF) are also known to be powerful modeling tools for static compile-time scheduling onto single and multicore processors [27], [28].…”

Section: Related Workmentioning

confidence: 99%

Online Energy-Efficient Task-Graph Scheduling for Multicore Platforms

Kanoun

Mastronarde

Atienza

et al. 2014

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-Numerous directed acyclic graph (DAG) schedulers have been developed to improve the energy efficiency of various multicore platforms. However, these schedulers make a priori assumptions about the relationship between the task dependencies, and they are unable to adapt online to the characteristics of each application without offline profiling data. Therefore, we propose a novel energy-efficient online scheduling solution for the general DAG model to address the two aforementioned problems. Our proposed scheduler is able to adapt at run-time to the characteristics of each application by making smart foresighted decisions, which take into account the impact of current scheduling decisions on the present and future deadline miss rates and energy efficiency. Moreover, our scheduler is able to efficiently handle execution with very limited resources by avoiding scheduling tasks that are expected to miss their deadlines and do not have an impact on future deadlines. We validate our approach against state-of-the-art solutions. In our first set of experiments, our results with the H.264 video decoder demonstrate that the proposed low-complexity solution for the general DAG model reduces the energy consumption by up to 15% compared to an existing sophisticated and complex scheduler that was specifically built for the H.264 video decoder application. In our second set of experiments, our results with different configurations of synthetic DAGs demonstrate that our proposed solution is able to reduce the energy consumption by up to 55% and the deadline miss rates by up to 99% compared to a second existing scheduling solution. Finally, we show that our DAG flow manager and scheduler have low complexities on a real mobile platform and we show that our solution is resilient to workload prediction errors by using different estimator accuracies.

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“…A two-stage solution to core mapping and application scheduling problems was also proposed in [4]. The solution is reached by running iteratively these two consecutive stages (master and sub-problems).…”

Section: Related Workmentioning

confidence: 99%

“…Voltage-Frequency Island -VFI) to use more efficiently the resources available such as power, area/surface, bandwidth and other related parameters [1,2]. Core mapping and application scheduling [3] problems are essential optimization problems for designing NoC systems whether they are homogeneous or heterogeneous [4]. In our earlier work [5,6], a Constraint Programming (CP) based approach was proposed successfully to determine optimum core mapping and application scheduling at transmitted packet level.…”

Section: Introductionmentioning

confidence: 99%

Voltage island based heterogeneous NoC design through constraint programming

Demiriz

Bagherzadeh

Öztürk

2014

Computers & Electrical Engineering

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a b s t r a c tThis paper discusses heterogeneous Network-on-Chip (NoC) design from a Constraint Programming (CP) perspective and extends the formulation to solving Voltage-Frequency Island (VFI) problem. In general, VFI is a superior design alternative in terms of thermal constraints, power consumption as well as performance considerations. Given a Communication Task Graph (CTG) and subsequent task assignments for cores, cores are allocated to the best possible places on the chip in the first stage to minimize the overall communication cost among cores. We then solve the application scheduling problem to determine the optimum core types from a list of technological alternatives and to minimize the makespan. Moreover, an elegant CP model is proposed to solve VFI problem by mapping and grouping cores at the same time with scheduling the computation tasks as a limited capacity resource allocation model. The paper reports results based on real benchmark datasets from the literature.

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Reducing the Abstraction and Optimality Gaps in the Allocation and Scheduling for Variable Voltage/Frequency MPSoC Platforms

Cited by 10 publications

References 30 publications

A Language and Preprocessor for User-Controlled Generation of Synthetic Programs

A Language and Preprocessor for User-Controlled Generation of Synthetic Programs

Online Energy-Efficient Task-Graph Scheduling for Multicore Platforms

Voltage island based heterogeneous NoC design through constraint programming

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