Common-Mode Injection PWM for Parallel Converters

Abstract

The ac-side terminal voltages of parallelconnected converters are different if the line reactive drops of the individual converters are different. This could result either from differences in per-phase inductances or from differences in the line currents of the converters. In such cases, the modulating signals are different for the converters. Hence, the common-mode (CM) voltages for the converters, injected by conventional space vector pulsewidth modulation (CSVPWM) to increase dc-bus utilization, are different. Consequently, significant low-frequency zerosequence circulating currents result. This paper proposes a new modulation method for parallel-connected converters with unequal terminal voltages. This method does not cause low-frequency zero-sequence circulating currents and is comparable with CSVPWM in terms of dc-bus utilization and device power loss. Experimental results are presented at a power level of 150 kVA from a circulating-power test setup, where the differences in converter terminal voltages are quite significant.

Circulating Current Analysis and Suppression for Configured Three-Limb Inductors in Paralleled Three-Level T-Type Converters With Space-Vector Modulation

“…Moreover, if parallel system is equipped with TPSIs, we can extend the proposed method in [24] to suppress the remaining low-frequency ZSCCs by the closed-loop control. Note that, the disadvantage of the proposed method is that at a high modulation index range when the system saturates, the zero-sequence voltage of the follower converter cannot exactly follow the zero-sequence voltages of the master converter due to the lesser duration in the utilization of redundant vectors, which suffers the same limits as the two-level parallel case that suppress the ZSCCs by adjusting the distribution of the zero-vectors with the open-loop controller [22][23] and close-loop controller [24][25][26].…”

“…One approach is to remove the AZSV of each converter by modified SVPWM [20], selective harmonic elimination pulse width modulation [21], etc. Another approach is to remove the differences in the AZSVs between parallel-connected converters by open-loop control methods [22,23], closed-loop control methods based on SVPWM [24][25][26], etc. However, these strategies are based on TSPIs without taking magnetic circuit characteristics of 3P3LIs into account.…”

Common‐mode voltage injection‐based nearest level modulation with loss reduction for modular multilevel converters

“…Common‐mode voltage injection is a well‐known modulation optimisation strategy in three‐phase systems with sinusoidal pulse width modulation (SPWM) control [18, 19]. It is aimed to increase the dc‐bus utilisation rate or modulation index.…”

Robustness and Balancing of Parallel-Connected Power Devices: SiC Versus CoolMOS

“…CoolMOS competes with SiC in the sub 1200 V application space. In high current applications where several die are required in parallel, the ability of the devices to share current and temperature equally is important [28,29]. How the current and temperature balancing capabilities of CoolMOS devices under CIS and UIS compare with SiC power MOSFETs is not known.…”