Commercial molecular beam epitaxy production of high quality SrTiO3 on large diameter Si substrates

Abstract

The authors report on the development of a molecular beam epitaxy production process for the epitaxial growth of high quality, single crystal, single phase SrTiO3 (STO) films on Si substrates with diameter up to 8in. Reflection high-energy electron diffraction indicated that the STO growths proceeded two dimensionally with excellent stoichiometric control, as confirmed by Rutherford backscattering spectroscopy measurement. Excellent crystalline quality has been confirmed by x-ray diffraction rocking curves of the STO (200) reflection with narrow full width at half maximum of 0.06° for a 1200Å thin film. Atomic force microscopy images show smooth, defect-free STO surface with a root-mean-square roughness value as low as ∼0.6Å. Cross-sectional transmission electron microscope images reveal an abrupt interface between STO and Si, with a very thin SiO2 interfacial layer.

Incorporation of La in epitaxial SrTiO3 thin films grown by atomic layer deposition on SrTiO3-buffered Si (001) substrates

“…[1][2][3] Since the early 2000s, several groups have reported on the direct deposition of epitaxial strontium titanate, SrTiO 3 (STO), on Si (001) substrates. [4][5][6][7][8][9][10][11][12] Furthermore, creation of STO pseudo-substrates has opened up a route to the integration of functional oxides and heterostructures onto a silicon platform. The use of a ferroelectric gate dielectric in a field-effect transistor (the so-called FeFET) has been proposed as a means to reduce the sub-threshold slope of the field-effect transistor below the thermodynamic limit of 60 mV/decade, 13 which is desired for low voltage, low power applications.…”

A strong electro-optically active lead-free ferroelectric integrated on silicon

“…Since the first methods to epitaxially deposit perovskite thin films on Si were established 4 , the growth process has been carefully optimized 5 and single crystalline layers were fabricated even on large-scale 8 00 substrates 6 . However, the interest in this research field has mainly been motivated by the use of oxides in the electronic domain, such as memory applications 7 , gate dielectrics in field-effect transistors 8 or alloxide electronics 9 .…”

Integration of III-V and Si CMOS Devices by Molecular Beam Epitaxy

“…Excellent crystalline quality was further demonstrated by the sharp STO(002) peak in the XRD rocking curve. The full-width at half-maximum of 0.06° measured on a 1200 Å STO/Si film is comparable to that of STO bulk materials (25,26). In addition to high structural quality, low surface roughness is also a key prerequisite for an oxide buffer or transition layer.…”

“…Subsequent growth of bulk STO layer was carried out at around 750 °C. Details of STO growth on Si has been reported elsewhere (25). Figure 11 shows a series of RHEED patterns for a 60 ML thick STO layer along the relevant [100], [110], and [210] azimuths of STO.…”