CMOS/SOI hardening at 100 Mrad (SiO/sub 2/)

Investigations on the Vulnerability of Advanced CMOS Technologies to MGy Dose Environments

“…This technology has already demonstrated its ability to withstand TID in the 10 kGy (Mrad) range combined to very low power consumption needed for stand-alone applications. SOI/SOS technologies, either with a thick or with a partially depleted active silicon layer [10]- [12], can withstand high TID levels. In this paper, a 0.13 m PDSOI technology is studied to investigate whether or not the TID induced charge trapping in the buried oxide (BOX) is an intrinsic limitation for use in MGy dose environments.…”

Worst-case bias during total dose irradiation of SOI transistors

“…The buried oxide isolation and the small volume of silicon present many advantages for speed, density, and transient irradiation [4]. But, unless radiation hardened [5], the buried oxide also induces total dose leakage currents [6].…”

Impact of GigaRad Ionizing Dose on 28 nm bulk MOSFETs for future HL-LHC

“…Moreover, the latest CMOS technologies are available either in bulk or SOI processes. In [5], for the same feature size, bulk CMOS has been found more radiation-resistant than SOI. The effects due to ionizing radiation can hence be reduced by choosing an advanced bulk technology.…”

“…Only a few papers have indeed been dedicated to the effects in electronic devices at very high TID [5]- [8]. Moreover, to our knowledge, none have been published about the combination of high dose on nanoscale CMOS technology, especially 28 nm bulk CMOS.…”