CMOS-integrated high-speed MSM germanium waveguide photodetector

Assefa, Solomon; Xia, Fengnian; Bedell, Stephen W.; Zhang, Ying; Topuria, Teya; Rice, Philip M.; Vlasov, Yurii A.

doi:10.1364/oe.18.004986

Cited by 181 publications

(130 citation statements)

References 19 publications

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“…These properties make Ge one of the most promising materials for CMOS compatible photonic components including near-infra-red photodetectors [1][2][3][4] and, possibly, lasers [5][6][7] in the important spectral region of 1.3-1.6 lm. However, it is well known that conventional Ge heteroepitaxy on Si is complicated by the 4.2% difference in Ge and Si lattice constants.…”

Section: Introductionmentioning

confidence: 99%

“…Kamins, 2 X. Wu, 3 Detailed studies of the structural and optical properties of axial silicon-germanium nanowire heterojunctions show that despite the 4.2% lattice mismatch between Si and Ge they can be grown without a significant density of structural defects. The lattice mismatch induced strain is partially relieved due to spontaneous SiGe intermixing at the heterointerface during growth and lateral expansion of the Ge segment of the nanowire.…”

mentioning

confidence: 99%

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Structural and optical properties of axial silicon-germanium nanowire heterojunctions

Wang

Tsybeskov

Kamins

et al. 2015

Journal of Applied Physics

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Section: Introductionmentioning

confidence: 99%

mentioning

confidence: 99%

Structural and optical properties of axial silicon-germanium nanowire heterojunctions

Wang

Tsybeskov

Kamins

et al. 2015

Journal of Applied Physics

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“…Among possible semiconductor material choices for Si-based photonics, Ge is also the most promising candidate for active photonic devices on Si, thanks to its pseudo-direct gap electronic structure and compatibility with CMOS fabrication processes. Micrometer-scale-thick Ge-on-Si photonics, such as waveguide-coupled photodetectors (Liu et al, 2006;Assefa et al, 2010;Wang et al, 2011;Going et al, 2015;Sorianello et al, 2015), electro-absorption modulators (Chaisakul et al, 2012;Feng et al, 2012;Ren et al, 2012), and light sources (Liu et al, 2010(Liu et al, , 2012Camacho-Aguilera et al, 2012) have demonstrated their effectiveness and functionality. However, given their micrometer scales, these Ge/Si heterostructures are too thick to be directly integrated with the prevailing submicron or even nanometer-scale-thick Si electronic devices.…”

Section: Ge-based Mos Gate-stack Engineeringmentioning

confidence: 99%

Gate-Stack Engineering for Self-Organized Ge-dot/SiO2/SiGe-Shell MOS Capacitors

et al. 2016

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We report the first-of-its-kind, self-organized gate-stack heterostructure of Ge-dot/ SiO2/SiGe-shell on Si fabricated in a single step through the selective oxidation of a SiGe-nanopatterned pillar over a Si3N4 buffer layer on a Si substrate. Process-controlled tunability of the Ge-dot size (7.5-90 nm), the SiO2 thickness (3-4 nm), and the SiGeshell thickness (2-15 nm) have been demonstrated, enabling a practically achievable core building block for Ge-based metal-oxide-semiconductor (MOS) devices. Detailed morphologies, structural, and electrical interfacial properties of the SiO2/Ge-dot and SiO2/SiGe interfaces were assessed using transmission electron microscopy, energy dispersive X-ray spectroscopy, and temperature-dependent high/low-frequency capacitance-voltage measurements. Notably, NiGe/SiO2/SiGe and Al/SiO2/Ge-dot/SiO2/SiGe MOS capacitors exhibit low interface trap densities of as low as 3-5 × 10 11 cm −2 eV −1 and fixed charge densities of 1-5 × 10 11 cm −2, suggesting good-quality SiO2/SiGe-shell and SiO2/Ge-dot interfaces. In addition, the advantage of having single-crystalline Si1−xGex shell (x > 0.5) in a compressive stress state in our self-aligned gate-stack heterostructure has great promise for possible SiGe (or Ge) MOS nanoelectronic and nanophotonic applications.

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“…Here, threading dislocation densities have been reduced to the range of ~10 7 /cm 2 . Among them are, the graded buffer layer with chemical mechanical polishing (CMP) approach [27], the two step growth method [28], and the rapid melting growth method [29]. The two step low-temperature buffer layer growth is often employed due to no requirement for thick buffer layers, capability of growing thick epi layers, and compatibility with the back end of line (BEOL) CMOS processing.…”

Section: Modified Two-step Growthmentioning

confidence: 99%

Strong Electro-Absorption in GeSi Epitaxy on Silicon-on-Insulator (SOI)

Luo

Zheng

et al. 2012

Micromachines

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Abstract:We have investigated the selective epitaxial growth of GeSi bulk material on silicon-on-insulator substrates by reduced pressure chemical vapor deposition. We employed AFM, SIMS, and Hall measurements, to characterize the GeSi heteroepitaxy quality. Optimal growth conditions have been identified to achieve low defect density, low RMS roughness with high selectivity and precise control of silicon content. Fabricated vertical p-i-n diodes exhibit very low dark current density of 5 mA/cm 2 at −1 V bias. Under a 7.5 V/µm E-field, GeSi alloys with 0.6% Si content demonstrate very strong electro-absorption with an estimated effective ∆α/α around 3.5 at 1,590 nm. We compared measured ∆α/α performance to that of bulk Ge. Optical modulation up to 40 GHz is observed in waveguide devices while small signal analysis indicates bandwidth is limited by device parasitics. OPEN ACCESSMicromachines 2012, 3 346

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CMOS-integrated high-speed MSM germanium waveguide photodetector

Cited by 181 publications

References 19 publications

Structural and optical properties of axial silicon-germanium nanowire heterojunctions

Structural and optical properties of axial silicon-germanium nanowire heterojunctions

Gate-Stack Engineering for Self-Organized Ge-dot/SiO2/SiGe-Shell MOS Capacitors

Strong Electro-Absorption in GeSi Epitaxy on Silicon-on-Insulator (SOI)

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