2017 IEEE International Conference on IC Design and Technology (ICICDT) 2017
DOI: 10.1109/icicdt.2017.7993526
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Circuit-level simulation methodology for Random Telegraph Noise by using Verilog-AMS

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Cited by 5 publications
(2 citation statements)
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“…This agrees well with the 3D atomic simulation results by assuming different distances between individual traps in the dielectric and the percolation path in the channel induced by the non-uniform doping [23]. Since the standard RTN test measures ΔID/ID0 close to threshold region, this result suggests that the time-dependent variation could be overestimated [24]. Therefore, the measurement of the entire ID-VG under the RTN condition is essential.…”
Section: Applications To Rtn Study In Nano-scaled Devicesupporting
confidence: 84%
“…This agrees well with the 3D atomic simulation results by assuming different distances between individual traps in the dielectric and the percolation path in the channel induced by the non-uniform doping [23]. Since the standard RTN test measures ΔID/ID0 close to threshold region, this result suggests that the time-dependent variation could be overestimated [24]. Therefore, the measurement of the entire ID-VG under the RTN condition is essential.…”
Section: Applications To Rtn Study In Nano-scaled Devicesupporting
confidence: 84%
“…These effects are often grouped under the heading of excess noise in experimental studies [110,111]. As the localized states can be interpreted as traps, the fluctuations often appear as trapping/detrapping effects [112][113][114]. And, often the fluctuations are coupled to those from the random interface potential due to surface roughness [115].…”
Section: Discrete Impuritiesmentioning
confidence: 99%