Circuit Failure Prediction and Its Application to Transistor Aging

Agarwal, M.; Paul, B.C.; Zhang, Ming; Mitra, Subhasish

doi:10.1109/vts.2007.22

Cited by 372 publications

(196 citation statements)

References 23 publications

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“…Figure 8 shows our simulation results on ISCAS'85, IS-CAS'89, and ITC'99 benchmarks regarding the gates that cannot be characterized by using delay as the side channel due to reconvergences. The only possibility to conduct delay characterization is that there is no reconvergence from a specific input to a specific output in the design 1 . We observe that there is a large number of the gates (at least 40%) that are subject to reconvergences and thus are uncharacterizable using non-destructive delay measurements, leaving a large portion of the circuit under the risk of HT insertion.…”

Section: Resultsmentioning

confidence: 99%

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Wireless security techniques for coordinated manufacturing and on-line hardware trojan detection

Wei

Potkonjak

2012

Proceedings of the Fifth ACM Conference on Security and Privacy in Wireless and Mobile Networks

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This paper addresses the hardware Trojan (HT) attacks that impose severe threats to the security and integrity of wireless networks and systems. We first develop HT attack models by embedding a single HT gate in the target design that triggers advanced malicious attacks. We place the one-gate HT trigger in such a way that it exhibits rare switching activities, consumes ultra-low leakage power, and hides from delay characterizations. Therefore, the HT attack models are capable of bypassing the widely used side channel-based HT detection schemes. Furthermore, based on the HT attack models, we investigate the potential on-line threat models during the system operation and develop an in-field trusted HT detection approach using physical unclonable functions (PUFs). We evaluate the effectiveness of the HT attack and defense models on a set of ISCAS'85, ISCAS'89, and ITC'99 benchmarks.

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Section: Resultsmentioning

confidence: 99%

“…For example, aging can increase delay by 10% and leakage energy by several times [1]. For the discussion in this paper, we refer to the NBTI aging model presented by Chakravarthi et al [13], as shown in the Equation (5):…”

Section: Ic Aging Modelmentioning

confidence: 99%

Wireless security techniques for coordinated manufacturing and on-line hardware trojan detection

Wei

Potkonjak

2012

Proceedings of the Fifth ACM Conference on Security and Privacy in Wireless and Mobile Networks

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“…These phenomena are causing significant alterations of both delay and leakage char acteristics of a gate. For example, aging can increase delay by 10% and leakage energy by several times [18]. Currently, aging has been assumed as having a detrimental impact on IC performance.…”

Section: Ic Agingmentioning

confidence: 99%

Scalable consistency-based hardware trojan detection and diagnosis

Wei

Potkonjak

2011

2011 5th International Conference on Network and System Security

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Abstract-Hardware Trojans (HTs) have become a major concern in modern IC industry, especially with the fast growth in IC outsourcing. HT detection and diagnosis are challenging due to the huge number of gates in modern IC designs and the high cost of testing. We propose a scalable and efficient HT detection and diagnosis scheme based on segmentation and consistency analysis of the gate-level properties. Furthermore, we develop a HT masking approach that prevents the HTs from functioning using selective device aging. We evaluate our HT detection and diagnosis schemes on a set of ISCAS and ITC benchmarks.

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“…Some works have attempted to overcome this by using a worst-case stress probability of 0.95 instead of 1.0 on each gate [10], but this is purely empirical. Precise aging information is only obtainable from expensive postsilicon aging measurements performed directly on the circuit [12]- [14] instead of using surrogate sensors. The objective of this work is to build an efficient and precise scheme for diagnosing circuit delay degradation due to aging.…”

Section: Introductionmentioning

confidence: 99%

ReSCALE: Recalibrating sensor circuits for aging and lifetime estimation under BTI

Sengupta¹,

Sapatnekar²

2014

2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

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Abstract-Bias temperature instability (BTI) induced delay shifts in a circuit depend strongly on its operating environment. While sensors can capture some operating parameters, they are ineffective in measuring vital performance shifts due to changes in the workloads and signal probabilities. This paper determines the delay of an aged circuit by amalgamating more frequent measurements on ringoscillator sensors with infrequent online delay measurements on a monitored circuit to recalibrate the sensors. Our approach reduces the pessimism in predicting circuit delays, thus permitting lower delay guardbanding overheads compared to conventional methods.

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Circuit Failure Prediction and Its Application to Transistor Aging

Cited by 372 publications

References 23 publications

Wireless security techniques for coordinated manufacturing and on-line hardware trojan detection

Wireless security techniques for coordinated manufacturing and on-line hardware trojan detection

Scalable consistency-based hardware trojan detection and diagnosis

ReSCALE: Recalibrating sensor circuits for aging and lifetime estimation under BTI

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