Circuit analysis and optimization driven by worst-case distances

Lifetime Yield Optimization of Analog Circuits Considering Process Variations and Parameter Degradations

“…The analysis and optimization of analog circuits considering process variations alone have been in research for decades, and certain design centering algorithms and commercial software are available to achieve a design for yield (more specifically, fresh yield) (Nassif, 2008), (Antreich et al, 1994). On the other hand, the modeling of device parameter degradations such as Negative Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI) has been so far focusing mainly on the nominal values without considering the underlying variations during manufacture process (Jha et al, 2005), (Liu et al, 2006) and (Martin-Martinez et al, 2009).…”

Synthesis Of Manufacturable Analog Circuits

“…If we let include the region in the disturbance space where the probability of the disturbance is, say, less than from nominal, then the design problem NLIP implies that the design has to meet all the specifications for any disturbance that is less than . Further details of the formulations can be found in [23], and similar formulations have been presented in [1] [5]. This infinite programming formulation looks at yield as a constraint, and device mismatch disturbance [6][29] can also be incorporated into this framework, as will be shown by our examples.…”

“…The decision variables can be described as a set , where is the set of allowable values for . (1) To allow the use of simulated annealing, in ASTRX/ OBLX this constrained optimization problem is converted to an unconstrained optimization problem with the use of additional scalar weights. (2) As a result, the goal becomes minimization of a scalar cost function, , defined by equation (2).…”

“…Since then we have seen approaches to optimization-based nominal circuit design [24], and even analog circuit synthesis [4][11] [12][13] [18][21] [26]. We have also seen approaches to statistical IC design [6][8] [15] [33] and even some recent approaches that include operating ranges [1] [5]. The goal of analog circuit synthesis tools is to eliminate many of the circuit designer's most tedious tasks.…”

Hierarchical characterization of analog integrated CMOS circuits

“…Because of the shortening of design cycles, there is a great need for fully-automated analog circuit characterization. Further, computer aided circuit characterization is required to efficiently use sophisticated design methods, for example in the area of circuit optimization [ANO95], circuit modeling or worstcase simulation [AGW93].…”