Chiplet Set For Artificial Intelligence

Stevens, J.; Pan, Tse-Han; Ravichandiran, Prasanth Prabu; Franzon, Paul D.

doi:10.1109/3dic57175.2023.10154953

Cited by 1 publication

(1 citation statement)

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“…Research in this area is active with universities and industry groups, who report chiplet-based accelerators for machine learning and signal processing, taking advantage of interchip data rates exceeding 1 Tb/s. 7,8,9 The enhanced data rates derived by improved die-to-die interfaces also offer advantages for communication between data converters and processors. In the radio-frequency (RF) domain, analog-to-digital converters (ADCs) now exceed 10 Gb/s and can produce more than 100 Gb/s of data for downstream signal processing, providing opportunities for direct sampling of RF signals with broader bandwidths.…”

Section: Microelectronicsmentioning

confidence: 99%

Exploring Heterogeneous Integration: Its Essence and Future Path

Nordquist,

Chou

2024

Computer

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Heterogeneous integration (HI) is the integration of chiplets using packaging technologies. Whereas a traditional system on chip (SoC) uses semiconductor technologies to integrate functionalities on a single silicon wafer, HI looks to disaggregate the functionalities of a SoC into smaller chiplets, or use proven intellectual properties (IPs) and older technologies and repackage them into a new product built for specific applications. This approach of producing a system in package (SiP) has proven attractive, especially as the progress of Moore's law has waned. Indeed, for the bulk of our lifetime, Moore's law has allowed transistor densities to double every two years. This fueled the integration of increasingly complex functionalities into a single silicon chip and the aggregation of multiple functionalities, including the CPU, graphics processing, custom accelerators, memor y, and input-output functionalities. However, as the transistor integration approaches billions per chip, the economic and technological drivers are steering manufacturers away from monolithic integration. Here, as monolithic chip sizes swell to the size of a reticle, the yield of a monolithic SoC falls appreciably because of defects in the semiconductor manufacturing process. Consequently,

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Section: Microelectronicsmentioning

confidence: 99%