ChemInform Abstract: Uniformly Thick Selective Epitaxial Silicon

Pagliaro, R.; Corboy, J. F.; Jastrzȩbski, L.; Soydan, R.

doi:10.1002/chin.198736010

Cited by 4 publications

(4 citation statements)

References 1 publication

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“…It should also be noted that without the presence of the AIC poly‐Si layer, silicon nanowires do not grow on the fused quartz during the typical growth period (2–3 mins). The lack of Si nanowire nucleation on bare fused quartz is believed to arise from the selective nature of silicon thin film deposition using SiCl 4 , where the HCl produced from the reaction of SiCl 4 and H 2 suppresses the nucleation of silicon on an SiO 2 surface . In the case of silicon nanowire growth by VLS, gold particles are present on the fused quartz surface, however, without the AIC Si layer, there is insufficient silicon present on the surface to form a supersaturated Au‐Si alloy droplet which is needed for nucleation and growth of a silicon nanowire with SiCl 4 .…”

Section: Resultsmentioning

confidence: 51%

Silicon nanowire growth on poly‐silicon‐on‐quartz substrates formed by aluminum‐induced crystallization

Kendrick

Bomberger

Dawley

et al. 2013

Crystal Research and Technology

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The vertical growth of Si nanowires on non‐monocrystalline substrates is of significant interest for photovoltaics and other energy harvesting applications. In this paper, we present results on using poly‐Si layers formed by aluminum‐induced crystallization (AIC) on fused quartz wafers as an alternative substrate for the vapor‐liquid‐solid (VLS) growth of vertical Si nanowires. Oxidation of the Al surface to Al2O3 before the a‐Si deposition was shown to be a key requirement in the formation of the poly‐Si template since it promotes the crystallization of the a‐Si into Si(111) which is required for vertical silicon nanowire growth. The effect of Al deposition technique (DC sputtering versus thermal evaporation) on a‐Si crystallization and Si nanowire growth was investigated. The use of Al thermal evaporation yielded AIC poly‐Si layers with the highest fraction of 〈111〉 grains as measured by orientation imaging microscopy (OIM) which enabled the growth of vertical Si nanowires. Cross‐sectional transmission electron microscopy analysis confirmed that the 〈111〉 Si nanowires grew epitaxially off of {111}poly‐Si grains in the AIC layer. This study demonstrates the potential of using AIC poly‐Si as a template layer for the vertical growth of silicon nanowires on amorphous substrates.

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Section: Resultsmentioning

confidence: 51%

Silicon nanowire growth on poly‐silicon‐on‐quartz substrates formed by aluminum‐induced crystallization

Kendrick

Bomberger

Dawley

et al. 2013

Crystal Research and Technology

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show abstract

“…12 However, for this process it has also been shown that some control of loading effects and pattern dependency can be achieved by adjusting the partial pressure of HCl. 13,14 A CVD deposition on blanket wafers may be described using the classical boundary layer theory. 15 In this theory, a laminar gas stream is flowing over the wafer.…”

Section: Resultsmentioning

confidence: 99%

Pattern Dependency and Loading Effect of Pure-Boron-Layer Chemical-Vapor Deposition

Mohammadi

Boer

Scholtes

et al. 2012

ECS J. Solid State Sci. Technol.

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The pattern dependency of pure-boron (PureB) layer chemical-vapor Deposition (CVD) is studied with respect to the correlation between the deposition rate and features like loading effects, deposition parameters and deposition window sizes. It is shown experimentally that the oxide coverage ratio and the size of windows to the Si on patterned wafers are the main parameters affecting the deposition rate. This is correlated to the gas depletion of the reactant species in the stationary/low-velocity boundary layer over the wafer. An estimation of the radius of gas depletion for Si openings and/or diffusion length of diborane in this study yield lengths in the order of centimeters, which is related to the boundary layer thickness. The deposition parameters; pressure and flow rates are optimized to minimize the pattern dependency of the PureB deposition rates. A very low standard deviation, less than 0.02, is achieved while at the same time making it independent of oxide coverage ratios and window sizes.

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“…This then is an alternative means for forming SOI (silicon-on-insulator) structures. A number of papers have reviewed the merits and problems of the ELO process as applied to such structures [27][28][29]. This paper contains an overview of our studies of the SEG process at the IBM Thomas J. Watson Research Center, including studies of its materials aspects and its potential applicability to the fabrication of several types of silicon devices and integrated-circuit structures.…”

Section: Introductionmentioning

confidence: 99%

Selective epitaxial growth of silicon and some potential applications

et al. 1990

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ChemInform Abstract: Uniformly Thick Selective Epitaxial Silicon

Abstract: has been grown on a Si wafer by CVD selective epitaxy with SiO2 mask openings to the substrate of various dimensions and with various Si/SiO2 area ratios.

Cited by 4 publications

References 1 publication

Silicon nanowire growth on poly‐silicon‐on‐quartz substrates formed by aluminum‐induced crystallization

Silicon nanowire growth on poly‐silicon‐on‐quartz substrates formed by aluminum‐induced crystallization

Pattern Dependency and Loading Effect of Pure-Boron-Layer Chemical-Vapor Deposition

Selective epitaxial growth of silicon and some potential applications

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