Charge sharing concept for power efficiency and EME improvement of boosted charge pumps in NVMs

Lauterbach, C.; Weber, W.; Romer, D.; Huber, M.

doi:10.1109/vlsic.1999.797225

Cited by 2 publications

(3 citation statements)

References 3 publications

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“…On the other hand, a solution to improve both efficiency and gain of capacitive charge pump circuits was reported in [12], [13]. It consists of charge reusing by adding a clock signal and some switches linking the bottom parasitic capacitances of the charge pumps.…”

Section: Related Workmentioning

confidence: 99%

“…Both matrices are listed in Appendix A. K 1 is a column vector that takes into account the effect of the current load, I out . It is given by (12), where D is the clock duty cycle and T the clock period.…”

Section: A Model With Parasitic Capacitancesmentioning

confidence: 99%

“…This efficiency can be improved implementing the charge reusing technique, which was introduced in the 90s [10], [11]. This technique is applied to charge pumps in [12], [13], reaching significant improvements.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Dynamic Model of Switched-Capacitor DC–DC Converters in the Slow-Switching Limit Including Charge Reusing

Ferro

Brea

López

et al. 2017

IEEE Trans. Power Electron.

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An accurate model to analyze the dynamic behavior of two-phase switched-capacitor DC-DC converters in the slow-switching limit regime is proposed taking into account both top and bottom parasitic capacitances as well as the charge reusing approach. This technique features significant improvements in both gain and efficiency with respect to existing solutions. We calculate the slow-switching limit boundary layer taking into account the parasitic capacitances of the flying capacitors and the dynamic and parasitic effects from the switches. The model is highly accurate into this

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Section: Related Workmentioning

confidence: 99%

Section: A Model With Parasitic Capacitancesmentioning

confidence: 99%