Charge Collection Measurements on SOI Capacitors using Heavy Ion Microprobe at GSI

We present the architecture and a detailed pre-fabrication analysis of a digital measurement ASIC facilitating long-term irradiation experiments of basic asynchronous circuits, which also demonstrates the suitability of the general approach for obtaining accurate radiation failure models developed in our FATAL project. Our ASIC design combines radiation targets like Muller C-elements and elastic pipelines as well as standard combinational gates and flip-flops with an elaborate on-chip measurement infrastructure. Major architectural challenges result from the fact that the latter must operate reliably under the same radiation conditions the target circuits are exposed to, without wasting precious die area for a rad-hard design. A measurement architecture based on multiple non-rad-hard counters is used, which we show to be resilient against double faults, as well as many triple and even higher-multiplicity faults. The design evaluation is done by means of comprehensive fault injection experiments, which are based on detailed Spice models of the target circuits in conjunction with a standard double-exponential current injection model for single-event transients (SET). To be as accurate as possible, the parameters of this current model have been aligned with results obtained from 3D device simulation models, which have in turn been validated and calibrated using micro-beam radiation experiments at the GSI in Darmstadt, Germany. For the latter, target circuits instrumented with high-speed sense amplifiers have been used for analog SET recording. Together with a probabilistic analysis of the sustainable particle flow rates, based on a detailed area analysis and experimental cross-section data, we can conclude that the proposed architecture will indeed sustain significant target hit rates, without exceeding the resilience bound of the measurement infrastructure.

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An infrastructure for accurate characterization of single-event transients in digital circuits

Veeravalli

Polzer

Schmid

et al. 2013

Microprocessors and Microsystems

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Pulse Shape Measurements by On-Chip Sense Amplifiers of Single Event Transients Propagating Through a 90 nm Bulk CMOS Inverter Chain

Hofbauer

Schweiger

Dietrich

et al. 2012

IEEE Trans. Nucl. Sci.

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Single event transient (SET) pulse shapes caused by Au ions with an energy of 946 MeV were measured at the microprobe facility at GSI in Darmstadt. Using on-chip sense amplifiers, our novel approach allows observing SET pulse shapes at any interesting circuit node with negligible distortion. We were hence able to accurately trace the propagation of SET pulses through a 90 nm CMOS inverter chain.Index Terms-Analog on-chip measurement, heavy ions, microprobe, particle beams, position dependence, radiation effects in devices, radiation effects in ICs, sense amplifiers, single event effects, single event transient (SET), soft errors.

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Charge Collection Measurements on SOI Capacitors using Heavy Ion Microprobe at GSI

Cited by 2 publications

References 13 publications

An infrastructure for accurate characterization of single-event transients in digital circuits

An infrastructure for accurate characterization of single-event transients in digital circuits

Pulse Shape Measurements by On-Chip Sense Amplifiers of Single Event Transients Propagating Through a 90 nm Bulk CMOS Inverter Chain

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