Characterization of Single-Photon Avalanche Diodes in a 0.5- Standard CMOS Process—Part 2: Equivalent Circuit Model and Geiger Mode Readout

Modeling Emerging Semiconductor Devices for Circuit Simulation

“…Single photon avalanche diodes (SPADs) based optical detectors have gained interest for use in a wide range of applications such as biochemical analysis, imaging and light ranging applications [26][27][28][29][30][31][32]. The main causes of the increased popularity are the exceptional level of miniaturization and portability, overall high performance and low costs due to the integration of SPADs with mixed-signal readout circuits in standard complementary metal-oxide-semiconductor (CMOS) technology [26][27][28][29][30][31][32]. The capability to detect single photon and provide subnanosecond time resolution along with the low-power and high-speed CMOS readout circuits have made SPADs superior to other optical detectors in high performance weak optical signal detection applications.…”

“…This rapid multiplication process results in a sudden large avalanche current. The reverse voltage above which this multiplication process occurs is called breakdown voltage [26][27][28][29][30][31][32]. In order to respond to an incident photon, impact ionization is necessary for a SPAD.…”

“…The generation of an electron-hole pairs causes the device to be in an "ON" or "OFF" state. Since the generation of an avalanche gives a current or voltage spike, the device exhibits an inherently digital operation [26][27][28][29][30][31][32]. Figure 5 shows the Geiger mode operation of SPAD and quenching of the avalanche current.…”

“…SPADs fabricated in CMOS provides the benefits of commercial CMOS process such as low cost, miniaturization, and improved performance [27][28][29][30][31][32]. However, due to the planar nature of the junction in standard CMOS process, electric field distributions exhibit maxima at the diodes' edge [27][28][29][30][31][32]. Since SPADs operate in a high reverse bias region, they are more vulnerable to breakdown at the edges.…”

“…This premature breakdown is one of the major problems of SPADs implemented in standard CMOS process [27][28][29][30][31][32]. It has been previously proved that the perimeter gated SPAD (PGSPAD), a p-n junction incorporating a poly-silicon gate surrounding the periphery, suppresses the premature breakdown effectively [29,31,[33][34][35][36][37][38][39]. The applied voltage at the gate terminal modulates the electric field making it uniform throughout the junction preventing the premature breakdown.…”