Characterization of scaled MANOS nonvolatile semiconductor memory (NVSM) devices

Wang, Gan; White, M.H.

doi:10.1016/j.sse.2008.06.036

Cited by 21 publications

(9 citation statements)

References 16 publications

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“…Some of the typical mechanisms for programming used in MANOS devices are Fowler-Nordheim tunneling (FNT), direct bandto-band tunneling, modified FNT (MFNT), and trap-assisted tunneling (TAT) [13], [14]. These tunneling mechanisms can be observed separately by varying the electric field.…”

Section: Resultsmentioning

confidence: 99%

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Negative-/Positive-Bias-Instability Analysis of the Memory Characteristics Improved by Hydrogen Postannealing in MANOS Capacitors

Kim

Seo

et al. 2010

IEEE Trans. Device Mater. Relib.

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We report the effect of hydrogen annealing on the gate-leakage-current and switching characteristics of metalalumina-nitride-oxide-silicon (MANOS) capacitors by analyzing their negative-/positive-bias instability (NBI/PBI). One sample, namely, A, is annealed with rapid thermal annealing (RTA), and the other sample, namely, B, is first annealed with RTA and then further annealed in a furnace, using a N 2 −H 2 (98% nitrogen and 2% hydrogen) gas mixture. In the NBI/PBI experiments, the flatband voltage shift ΔV FB is observed to be smaller, i.e., the gate-leakage-current density is reduced for sample B at gate voltages less than ±3 V, a domain where trap-assisted tunneling is dominant. However, ΔV FB increases rapidly for the same sample at gate voltages larger than ±6 V, a domain where the modified Fowler-Nordheim tunneling (MFNT) is dominant, which indicates faster program-and-erase characteristics. These results show that additional hydrogen annealing can improve both device reliability and switching characteristics of the MANOS-type memory by reducing interface traps between the silicon substrate and silicon oxide layers, as well as turn-on voltages for MFNT.Index Terms-Flash memory, metal-alumina-nitride-oxidesilicon (MANOS), negative-bias (NB) temperature instabilities (NBTIs), passivation effect, positive-bias (PB) temperature instabilities (PBTIs), postannealing.

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Section: Resultsmentioning

confidence: 99%

“…On the other hand, in an erase state, the E OX -induced gate leakage current occurred at −4.5 and 0.9 MV/cm for sample A and at −4.5 and 1.8 MV/cm for sample B. The E TO was calculated according to [13] …”

Section: Resultsmentioning

confidence: 99%

Negative-/Positive-Bias-Instability Analysis of the Memory Characteristics Improved by Hydrogen Postannealing in MANOS Capacitors

Kim

Seo

et al. 2010

IEEE Trans. Device Mater. Relib.

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“…Among many memory concepts proposed to replace the conventional floating gate devices, charge trapping based structure is considered to be the most promising candidate due to its immunity to stress-induced leakage current, reduced interference between adjacent cells and process compatibility with CMOS technology [1]. More recently, increasing attention has been paid to the reliability issues of charge trapping memory (CTM).…”

Section: Introductionmentioning

confidence: 99%

Simulation on endurance characteristic of charge trapping memory

Lun

Wang

Zeng

et al. 2013

2013 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)

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Fig.1. Schematic of the studied charge trapping device in this work. Fig.2. Mechanisms included to investigate (a) generation of Si/SiO2 interface trapped charge and (b) oxide trapped charge.Abstract-A comprehensive simulation method for endurance reliability issues in charge trapping memory is developed. For this purpose, a practical algorithm is carefully designed to investigate the cycling performance of charge trapping memory. The models that account for the generation of substrate/tunneling oxide interface trapped charge and oxide trapped charge are incorporated into the simulation. The influence of these models on flat-band voltage evolution under programing/erasing cycling is investigated in detail, thus providing insight into the mechanism of the endurance issues in charge trapping memory.

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“…CTF devices have been successfully demonstrated as strong candidates for future flash memories. [2][3][4] Although CTF is free from gate coupling, there are still issues such as slow erase speeds and relatively short data retention times. 5,6 To improve the P/E speed of CTF devices, tunnel barrier scaling is essential.…”

Section: Introductionmentioning

confidence: 99%

Performance improvement of metal-Al2O3-HfO2-oxide-silicon memory devices with band-engineered Hf-aluminate/SiO2 tunnel barriers

Lee

et al. 2013

Journal of Vacuum Science &Amp; Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phen

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Physical properties of Hf-aluminate (HA) films with various compositions, deposited by atomic layer deposition, were investigated in terms of microstructure, band-gap, and band-offset with respect to Si. Charge trap flash (CTF) memory devices based on HA/SiO2 stacks as tunnel barriers were also fabricated and characterized. Modulation of HA film composition produced controlled changes of the film's band-gap and band-offset. Additionally, the tunneling efficiency of the HA/SiO2 tunnel barrier stacks was observed to be higher than that for a single SiO2 tunnel barrier, in particular at high voltage bias. The band-engineered CTF memory devices with HA/SiO2 tunnel barriers showed improved program/erase speed compared with those with single SiO2 tunnel barrier. The Al-rich HA/SiO2 tunnel barriers showed a longer charge retention time with superior endurance characteristics; in contrast, the Hf-rich HA/SiO2 tunnel barrier showed degraded charge retention because of current leakage through crystallized regions in the film.

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Characterization of scaled MANOS nonvolatile semiconductor memory (NVSM) devices

Cited by 21 publications

References 16 publications

Negative-/Positive-Bias-Instability Analysis of the Memory Characteristics Improved by Hydrogen Postannealing in MANOS Capacitors

Negative-/Positive-Bias-Instability Analysis of the Memory Characteristics Improved by Hydrogen Postannealing in MANOS Capacitors

Simulation on endurance characteristic of charge trapping memory

Performance improvement of metal-Al2O3-HfO2-oxide-silicon memory devices with band-engineered Hf-aluminate/SiO2 tunnel barriers

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