Characterization of molded underfill material for flip chip ball grid array packages

Liu, F.; Wang, Y.P.; Chai, Kevin Tshun Chuan; Her, T.D.

doi:10.1109/ectc.2001.927737

Cited by 31 publications

(4 citation statements)

References 5 publications

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“…Compared with the conventional underfill which is usually filled with silica at around 50 wt%, molded underfill can afford a much higher filler content, up to 80 wt%, which offers a low CTE close that of the solder joint and the board. Also, compared with the conventional molding compound, molded underfill requires fillers in smaller size, which also can contribute to lower the CTE of the material [51]. Molded underfill is especially suitable for flip-chip in package to improve the production efficiency.…”

Section: Molded Underfillmentioning

confidence: 99%

Recent Advances in Flip-Chip Underfill: Materials, Process, and Reliability

Zhang

Wong

2004

IEEE Trans. Adv. Packag.

196

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In order to enhance the reliability of a flip-chip on organic board package, underfill is usually used to redistribute the thermomechanical stress created by the coefficient of thermal expansion (CTE) mismatch between the silicon chip and organic substrate. However, the conventional underfill relies on the capillary flow of the underfill resin and has many disadvantages. In order to overcome these disadvantages, many variations have been invented to improve the flip-chip underfill process. This paper reviews the recent advances in the material design, process development, and reliability issues of flip-chip underfill, especially in no-flow underfill, molded underfill, and wafer-level underfill. The relationship between the materials, process, and reliability in these packages is discussed.

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Section: Molded Underfillmentioning

confidence: 99%

Recent Advances in Flip-Chip Underfill: Materials, Process, and Reliability

Zhang

Wong

2004

IEEE Trans. Adv. Packag.

196

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“…Even apply heat sink to maintain package coplanarity, but the result isn't still capable and also limits components layout for users. Molding underfill (MUF) is an alternative technology to solve the problems facing in capillary underfill materials, especially with a focus on single chip packages [2,3,4]. The use of transfermolding technology allows higher filler loading of MUF materials.…”

Section: Introductionmentioning

confidence: 99%

High Performance Molding FCBGA Packaging Development

Tsai

Huang

Chiu

et al. 2007

2007 8th International Conference on Electronic Packaging Technology

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In this paper, new molding underfill structure is proposed. It shows many advantages, including a) Good package coplanarity b) Lower bump stress c) Lower 2'nd level ball stress d) Provide no limitation component design. Mold compound can hold big die and substrate together to keep good package coplanarity and give a uniform interface condition within big die area. Droping in heat spreader design gives the largest flexibility of die size and passive component size/number. Mold compound properties can be tailored to meet solder bump and low-K requirements. In addition, mold compound properties have high potential to meet Pb-free solder bump and low-K requirements. A high reliability, high thermal performance, and low package stress molding flip chip ball grid arrays structure is named terminator FCBGAR. It has many benefits, like better coplanarity, high through put (multi pcs per shut in molding process), low bump stress, and high thermal performance. In conventional flip chip structure, underfill dispenses and cure processes are a bottleneck due to low through put (dispensing unit by unit). For the high performance demand(high pin counts are necessary), large package/die size with more integrated functions needs to meet reliability criteria. Low k dielectric material, lead free bump especially and the package coplanarity are also challenges for package development. Besides, thermal performance is also a key concern with high power device. Low-k has become a hot topic as most 90nm devices and all 65nm devices utilize low-k dielectric. But low-k materials have very low mechanical strength compared to the traditional dielectric films due to their porous nature, which results in lower cohesive strength. Additionally, the tight bump pitch and low standoff height of future packages reduce the flow performance of conventional liquid capillary underfill (CUF) that results in low productivity (low unit per hour (UPH)) and low throughput. From simulation and reliability data, this new structure can provide strong bump protection and reach high reliability performance and can be applied for low-K chip and all kind of bump composition such as tin-lead, high lead, and lead free.

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“…So far, molded underfill technology (MUF) to meet these demands has been studied by packaging assembly houses and material suppliers [1][2][3][4] as a solution of smaller size with lower assembly cost. It is also an alternative solution to capillary underfill technology that is a mature encapsulation method of flip chip package [5].…”

Section: Introductionmentioning

confidence: 99%

MUF Technology Development for SiP Module

Kweon

Kim

et al. 2011

ECS Trans.

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In this study, we developed the molded underfill (MUF) technology for system in package (SiP) module with fine pitch flip chip in RF application, in which two flip chips, LC filter, and additional passive components are integrated sideby-side. This study covered not only MUF reliability performance but also MUF design study focused on minimizing voids between flip chip bumps in the SiP module. The investigation comprises several aspects: A design study that present a printed circuit board (PCB) and epoxy molding compound (EMC) selection approach, air vent design of cavity vacuum molding, and results of void free from Design of Experiment (DOE) of several SiP module layouts. In the end, Scanning Acoustic Tomography (SAT) result of void, moisture sensitivity test, thermal cycle test and pressure cooker test had also been carried out for reliability evaluation. The test result shows that the optimized SiP module with fine flip pitch has a good reliability performance.

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Characterization of molded underfill material for flip chip ball grid array packages

Cited by 31 publications

References 5 publications

Recent Advances in Flip-Chip Underfill: Materials, Process, and Reliability

Recent Advances in Flip-Chip Underfill: Materials, Process, and Reliability

High Performance Molding FCBGA Packaging Development

MUF Technology Development for SiP Module

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