Characterization of FPGA-master ARM communication delays in zynq devices

Costas, Lucia; Molanes, Roberto Fernandez; Rodríguez-Andina, Juan J.; Fariña, José

doi:10.1109/icit.2017.7915487

Cited by 14 publications

(6 citation statements)

References 5 publications

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“…However, EHW has only a few works on this topic due to the need for researchers with extensive expertise (knowledge) and practice in both the software and hardware domains, and most of these works address Xilinx Zynq-7000 devices [19]. For such reasons, we adopted Cyclone V FPSoC as a new evolution platform for evaluating the performance of the same application in EHW.…”

Section: A Reconfigurable Platformmentioning

confidence: 99%

Hardware Evolution Based on Improved Simulated Annealing Algorithm in Cyclone V FPSoCs

et al. 2020

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Evolvable hardware (EHW) is an emerging area of research that uses evolutionary algorithms (EAs) to construct circuits without manual intervention. However, this technique confronts two major issues: the evolution efficiency of structures and the computational efficiency of EAs. To address these issues, we construct a novel virtual reconfigurable circuit (VRC) based on artificial neural network (ANN) architecture and develop a promising EA based on improved simulated annealing (ISA) for the research of EHW. Here, ISA escapes the local optimization through an inner loop and expands new search space through an outer loop. Furthermore, several strategies are proposed for the representation, perturbation and selection of solutions (individuals) to reduce the computational burden throughout the entire evolution process. The use of an Intel Cyclone V field programmable system-on-chip (FPSoC) further accelerates the execution of the algorithm and provides designers with much more high-level processing power than that provided by soft-cores. The obtained results show that the proposed method achieves high-speed processing and improves computational efficiency. The results also show that the method has good flexibility and scalability. INDEX TERMS Evolvable hardware, artificial neural networks, improved simulated annealing, algorithm design and analysis, FPSoC.

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Section: A Reconfigurable Platformmentioning

confidence: 99%

Hardware Evolution Based on Improved Simulated Annealing Algorithm in Cyclone V FPSoCs

et al. 2020

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“…This structure provides ARM with a great advantage in terms of data calculation and logical control. ARM has more powerful computational capabilities than FPGA [ 32 , 33 ]. For achieving better performance than the ARM or FPGA platforms, the FPGA+ARM integrated platform (zynq 7000) of Xilinx Inc. (San Jose, CA, USA) was employed in this system.…”

Section: System Descriptionmentioning

confidence: 99%

A Fiber Bragg Grating Interrogation System with Self-Adaption Threshold Peak Detection Algorithm

Zhang

Jin

et al. 2018

Sensors

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A Fiber Bragg Grating (FBG) interrogation system with a self-adaption threshold peak detection algorithm is proposed and experimentally demonstrated in this study. This system is composed of a field programmable gate array (FPGA) and advanced RISC machine (ARM) platform, tunable Fabry–Perot (F–P) filter and optical switch. To improve system resolution, the F–P filter was employed. As this filter is non-linear, this causes the shifting of central wavelengths with the deviation compensated by the parts of the circuit. Time-division multiplexing (TDM) of FBG sensors is achieved by an optical switch, with the system able to realize the combination of 256 FBG sensors. The wavelength scanning speed of 800 Hz can be achieved by a FPGA+ARM platform. In addition, a peak detection algorithm based on a self-adaption threshold is designed and the peak recognition rate is 100%. Experiments with different temperatures were conducted to demonstrate the effectiveness of the system. Four FBG sensors were examined in the thermal chamber without stress. When the temperature changed from 0 °C to 100 °C, the degree of linearity between central wavelengths and temperature was about 0.999 with the temperature sensitivity being 10 pm/°C. The static interrogation precision was able to reach 0.5 pm. Through the comparison of different peak detection algorithms and interrogation approaches, the system was verified to have an optimum comprehensive performance in terms of precision, capacity and speed.

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“…For achieving better performance, the FPGA + ARM integrated platform is employed in this system. A field programmable gate array (FPGA) is applied to realize high speed sampling for high speed sampling, and an advanced reduced instruction set computer (RISC) machine (ARM) is employed to deal with the large amount of logical control and calculation for powerful computational capabilities [17,18]. Thus, the central wavelengths are capable of being calculated with the digital signal according to (1).…”

Section: Tunable F-p Filtering Principlementioning

confidence: 99%

Research on a Pulse Interference Filter Used for the Fiber Bragg Grating Interrogation System

Zhang

Ren

et al. 2018

Photonic Sens

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In this paper, a novel pulse interference filter for fiber Bragg grating (FBG) interrogation based on the tunable Fabry-Perot (F-P) filtering principle is proposed and experimentally demonstrated. The self-developed FBG interrogation system is devised for the aircraft health management of key structures. Nevertheless, the pulse interference is detected in the reflection spectrum of FBG causing interrogation system unstable. To address the problem, the first-order lag pulse broadening filter is proposed in this paper. The first-order lag filter is applied to preprocess and smooth the original signal, meanwhile enhancing the signal-to-noise ratio (SNR). Afterwards, peaks of reflection spectrum are distinguished with pulse interference by pulse broadening. Experimental results indicate that 634 peaks are detected before adopting the first-order lag pulse broadening filter. Comparatively, the number of peaks decreases to 203 after filtering the interference pulse, and the correct rate of peak detection is higher than 98.5%. Through the comparison with the finite impulse response (FIR) filter, the advantage of first-order lag filter is proved. The vibration monitoring experiment demonstrates that this system has high dynamic precision with a dynamic interrogation range of 0 Hz-400 Hz, and the maximum repetition rate of 800 Hz.

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Characterization of FPGA-master ARM communication delays in zynq devices

Cited by 14 publications

References 5 publications

Hardware Evolution Based on Improved Simulated Annealing Algorithm in Cyclone V FPSoCs

Hardware Evolution Based on Improved Simulated Annealing Algorithm in Cyclone V FPSoCs

A Fiber Bragg Grating Interrogation System with Self-Adaption Threshold Peak Detection Algorithm

Research on a Pulse Interference Filter Used for the Fiber Bragg Grating Interrogation System

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