Characterization and Modeling of Temperature Effects in 3-D NAND Flash Arrays—Part I: Polysilicon-Induced Variability

A comparison of modeling approaches for current transport in polysilicon-channel nanowire and macaroni GAA MOSFETs

“…This latter density was uniformly introduced in the channel volume to account for the high defect density that is typically present in polysilicon, neglecting its localization at the grain boundaries of the material (effective medium approximation). In the second approach, the channel was divided into Voronoi volumes of average size g = 40 nm separated by surfaces representing the polysilicon grain boundaries [11,12,30]. At these surfaces, a planar acceptor [23].…”

“…The device drain current versus gate voltage ( I D -V G ) transcharacteristic was simulated for a drain voltage V D = 0.5 V, assuming pure drift-diffusion transport (effective medium approximation and Voronoi grains) or mixed intra-grain drift-diffusion and inter-grain thermionic emission (Voronoi grains only, see [11,12] for details). A constant electron mobility n = 100 cm 2 /Vs [24,25] and a Richardson velocity v r = 2 √ kT∕2 m n [33] were adopted, respectively, for the drift-diffusion process and for thermionic emission.…”

“…In the on-state regime, instead, strong nonuniformities in channel electrostatics arise from the high free-electron concentration in the intra-grain regions and the strong filling of the acceptor traps at the grain boundaries. In particular, the nonuniformities in channel electrostatics result in high energy barriers at the grain boundaries [11,12,31], strongly limiting current transport through the polysilicon channel. This makes the gradual channel approximation less accurate and the activation of thermionic emission at the grain boundaries more relevant for I D .…”

“…The presence of grains separated by highly defective grain boundaries in the polysilicon channel of the strings introduces some relevant issues in the operation and in the reliability of the array. Among them, it is worth mentioning (i) a severe limitation to the string current, especially at low temperature [7]; (ii) transient instabilities in the string current, due to the dependence of the average occupancy of the traps at the grain boundaries on the bias history of the string [8][9][10]; (iii) variability in the cell threshold voltage ( V T ) and in its temperature dependence, due to the haphazardness in the configuration of the polysilicon grains [11,12]; (iv) the worsening of the amplitude statistics of random telegraph noise (RTN) affecting cell V T , due to the contribution to percolative channel conduction of the nonuniform inversion of the intra-grain and inter-grain regions [13][14][15][16][17][18][19]. The adoption of a thin annular channel instead of a full nanowire was demonstrated to be a successful solution to mitigate some of these issues [20,21].…”

“…In a more physics-based approach, the polysilicon channel is considered as the haphazard ensemble of monocrystalline grains separated by highly defective grain boundaries. In this latter case, pure drift-diffusion transport [26][27][28] or a mix of intra-grain drift-diffusion and intergrain thermionic emission have been considered [12,18,29,30]. In the presence of variety of approaches, a clear assessment of the impact of different modeling assumptions on the results for the electrical characteristics of the devices has not been provided so far.…”