Characterization and Modeling of Spin-Transfer Torque (STT) Magnetic Memory for Computing Applications

Abstract

With the ubiquitous diffusion of mobile computing and Internet of Things (IoT), the amount of data exchanged and processed over the internet is increasing every day, demanding secure data communication/storage and new computing primitives. Although computing systems based on microelectronics steadily improved over the past 50 years thanks to the aggressive technological scaling, their improvement is now hindered by excessive power consumption and inherent performance limitation associated to the conventional computer architecture (von Neumann bottleneck). In this scenario, emerging memory technologies are gaining interest thanks to their non-volatility and low power/fast operation. In this chapter, experimental characterization and modeling of spin-transfer torque magnetic memory (STT-MRAM) are presented, with particular focus on cycling endurance and switching variability, which both present a challenge towards STT-based memory applications. Then, the switching variability in STT-MRAM is exploited for hardware security and computing primitives, such as true-random number generator (TRNG) and stochastic spiking neuron for neuromorphic and stochastic computing.

Neural-inspired artificial synapses based on low-voltage operated organic electrochemical transistors

“…Two-terminal (2T)-and three-terminal (3T)-based electronic devices have been used to implement artificial synapses. [16][17][18][19][20][21] Different mechanisms, such as resistive switching randomaccess memory (RRAM), [22][23][24] phase-change memory (PCM) 2,25,26 ferroelectric random-access memory (FeRAM) 2,27 and spin-transfer torque magnetic random-access memory (STT-MRAM), 28 have been applied in fabricating 2T synaptic devices. These devices were designed based on the metal-insulator-metal (MIM) sandwich structure of an insulating/active layer material between two metal electrodes.…”

L2C2: Last-level compressed-contents non-volatile cache and a procedure to forecast performance and lifetime

“…For example, in the case of STT-RAM bitcells the wear produced by the cumulative effect of writes eventually leads to what is called time-dependent dielectric breakdown (TDDB). TDDB is the short-circuit of the thin dielectric layer (MgO) that isolates the two ferromagnetic electrodes (CoFeB): once the dielectric breakdown occurs the change is irreversible and the bitcell behaves as a small fixed-value resistor; it is no longer possible to distinguish between the parallel and antiparallel spin states, whose respective resistances are designed to be sufficiently different to encode a bit reliably [ 8 ].…”

“…In the short to medium term, non-volatile memory (NVM) technologies rise as an alternative to SRAMs due to their higher density and lower static power. Among these technologies we can mention phase change (PCM) [2][3][4], magnetic tunnel junction (STT-RAM) [1,[5][6][7][8], or resistive (ReRAM) [9,10].…”