Characterization and Mitigation of Single-Event Transients in Xilinx 45-nm SRAM-Based FPGA

Keren, Elad; Greenberg, Shlomo; Yitzhak, Nir M.; David, D.; Refaeli, Nati; Haran, A.

doi:10.1109/tns.2019.2916151

Cited by 12 publications

(4 citation statements)

References 34 publications

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“…The Integrated Circuit (IC) manufacture is in the nanoscale era, implying a very large-scale integration. However, due to the decreased supply voltage and node capacitance, the amount of charge stored in a circuit node decreases, making the circuit more susceptible to various types of particles, such as protons, neutrons, heavy ions, alpha particles and high energy electrons, that generate faults during space applications [1][2][3][4]. Faults in ICs have been studied for over 40 years [5][6][7][8].…”

Section: Introductionmentioning

confidence: 99%

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PCoSA: A product error correction code for use in memory devices targeting space applications

et al. 2020

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Section: Introductionmentioning

confidence: 99%

“…1 shows that Hamming is a binary linear block code with r ! 2, which is based on Equations ( 2) and (3).…”

Section: Introductionmentioning

confidence: 99%

PCoSA: A product error correction code for use in memory devices targeting space applications

et al. 2020

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“…We should also mention that, technically, logic resources on the FPGA are prone to experiencing transient faults. However, as FPGAs do not run at frequencies nearly as fast as a modern ASICs/CPUs/GPUs, the SET cross section pales in comparison to the SEU cross section of the configuration memory (the former typically being orders of magnitude higher) [41]. Specifically, the SET cross section (i.e.…”

Section: Multi-level Fault Propagation Modelmentioning

confidence: 99%

Efficient Error Detection for Matrix Multiplication With Systolic Arrays on FPGAs

Libano

Rech

Brunhaver

2023

IEEE Trans. Comput.

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Matrix multiplication has always been a cornerstone in computer science. In fact, linear algebra tools permeate a wide variety of applications: from weather forecasting, to financial market prediction, radio signal processing, computer vision, and more. Since many of the aforementioned applications typically impose strict performance and/or fault tolerance constraints, the demand for fast and reliable matrix multiplication (MxM) is at an all-time high. Typically, increased reliability is achieved through redundancy. However, coarse-grain duplication incurs an often prohibitive overhead, higher than 100%. Thanks to the peculiar characteristics of the MxM algorithm, more efficient algorithm-based hardening solutions have been designed to detect (and even correct) some types of errors with lower overhead. We show that, despite being more efficient, current solutions are still sub-optimal in certain scenarios, particularly when considering persistent faults in Field-Programmable Gate-Arrays (FPGAs). Based on a thorough analysis of the fault model, we propose an error detection technique for MxM that decreases both algorithmic and architectural costs by over a polynomial degree, when compared to existing algorithm-based strategies. Furthermore, we report arithmetic overheads at the application level to be under 1% for three state-of-the-art Convolutional Neural Networks (CNNs).

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“…However, SET is more frequently captured by FFs as the clock frequency increases [5], [6]. Therefore, in advanced technology, measuring SET rates and their pulse widths has become important for calculating the soft error rate and estimating the reduction of error rate by low-pass filters [7], [8]. Furthermore, measuring the SET pulse width distribution can be used to evaluate the distribution of the amount of collected charge generated by radiation strike, since the SET pulse width depends on the amount of collected charge.…”

Section: Introductionmentioning

confidence: 99%

Measuring SET Pulse Widths in pMOSFETs and nMOSFETs Separately by Heavy-ion and Neutron Irradiation

FURUTA,

SUGITANI,

NAKAJIMA

et al. 2024

IEICE Trans. Electron.

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Radiation-induced temporal errors become a significant issue for circuit reliability. We measured the pulse widths of radiationinduced single event transients (SETs) from pMOSFETs and nMOSFETs separately. Test results show that heavy-ion induced SET rates of nMOS-FETs were twice as high as those of pMOSFETs and that neutron-induced SETs occurred only in nMOSFETs. It was confirmed that the SET distribution from inverter chains can be estimated using the SET distribution from pMOSFETs and nMOSFETs by considering the difference in load capacitance of the measurement circuits.

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Characterization and Mitigation of Single-Event Transients in Xilinx 45-nm SRAM-Based FPGA

Cited by 12 publications

References 34 publications

PCoSA: A product error correction code for use in memory devices targeting space applications

PCoSA: A product error correction code for use in memory devices targeting space applications

Efficient Error Detection for Matrix Multiplication With Systolic Arrays on FPGAs

Measuring SET Pulse Widths in pMOSFETs and nMOSFETs Separately by Heavy-ion and Neutron Irradiation

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