Characterisation of power modules ceramic substrates for reliability aspects

Pietranico, Sylvain; Pommier, Sylvie; Lefebvre, Stéphane; Khatir, Zoubir; Bontemps, Serge

doi:10.1016/j.microrel.2009.06.026

Cited by 24 publications

(5 citation statements)

References 7 publications

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“…The results show that the maximum stress decrease when d increase and w decrease. Since the accumulated plastic strain of copper affects the fatigue life of DBC [22], The max equivalent plastic strains of top copper at corner points A and B during thermal cycling are analyzed. According to the FE results, the plastic strain at point A changes very little with or without dimple traces on the bottom copper layer.…”

Section: A Design On Parallel Dimple Tracesmentioning

confidence: 99%

A Stress-Relieved Method Based on Bottom Pattern Design Considering Thermal and Mechanical Behavior of DBC Substrate

et al. 2022

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Traditionally, reliability-improved methods like etched dimples are set at the edge of the copper pattern to relieve the thermal-mechanical stress on direct bonded copper (DBC). When the copper ratio of the top copper pattern is less than the copper ratio of the bottom copper pattern, these methods are less effective at the inner edges of the top ceramic interface where the initial crack appears. Currently, no explanation is found for this phenomenon and other solutions should be taken to this problem. Hence, this paper analyzed the mechanism of the phenomenon and proposed a bottom pattern design to solve the problem. Based on a bi-material model and FE analysis, it can be found that the stress concentration on the top ceramic interface is caused by the opposite bending actions on the two ceramic interfaces. To eliminate the geometrical difference between two copper layers, Pa rallel dimple traces are used on the bottom instead of mirror-copied gap on the consideration of thermal resistance and mechanical strength. The parameters of dimple trace were chosen by simulations on stress-strain results under thermal cycling and therma l resistance calculations in a module packaging. FE results show that the bottom dimple trace with a diameter of 0.4mm and a gap of 2mm can adjust the thermal-induced strain behavior of the singularities at the top copper to be even and sacrifices only a 2% thermal resistance rise of the module packaging. Life prediction model based on strain shows that the bottom design can improve the life time of the substrate. The thermal cycling test result on sample DBC and thermal resistance measurement on module packaged by DBC with bottom pattern design verify the FE analysis. This method can be widely used on the packaging design of power module using stand -alone DBC substrate.

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Section: A Design On Parallel Dimple Tracesmentioning

confidence: 99%

A Stress-Relieved Method Based on Bottom Pattern Design Considering Thermal and Mechanical Behavior of DBC Substrate

et al. 2022

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“…Regarding the ceramic substrates, Si 3 N 4 has been identified as the most attractive material for reliable substrates [5,6]. Indeed, its flexural strength (700 MPa) is almost double of that of Al 2 O 3 (450 MPa) or AlN (350 MPa) [7].…”

Section: Introductionmentioning

confidence: 99%

Lifetime of power electronics interconnections in accelerated test conditions: High temperature storage and thermal cycling

Sabbah

Arabi

Aviñó-Salvadó

et al. 2017

Microelectronics Reliability

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We investigate the effect of three testing conditions (thermal shock, Rapid Temperature Changes-RTC-and high temperature storage) on the interconnects of a power electronic module. In particular, the mechanical strength of thick aluminium wirebonds is investigated and shows that while it is not affected by storage at 230°C, it is much more sensitive to thermal cycling. Shock tests are found to be especially severe, despite having a smaller temperature swing than RTC. Regarding the die attach, no noticeable reduction in mechanical strength is found, regardless of the ageing conditions, and despite clear micro-structural evolutions.

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“…This requires accurate models to describe the behavior of the copper, the ceramic and their interface. In particular [14] showed that the hardening of the copper (during thermal cycling) plays a very important role. In [15], it is shown that submitting the DBC to a few wide thermal cycles actually makes it more ro- bust to further (narrower) cycling.…”

Section: Introductionmentioning

confidence: 99%

Characterization of materials and their interfaces in a direct bonded copper substrate for power electronics applications

Kabaar

Buttay

Dezellus

et al. 2017

Microelectronics Reliability

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International audienceDirect Bonded Copper (DBC) are produced by high temperature (>1000 °C) bonding between copper and a ceramic (usually alumina). They are commonly used in power electronics. However, their reliability when exposed to thermal cycling is still an issue, that could be addressed by advanced numerical simulations. This paper describes the identification of the parameters for a numerical model that uses finite elements with cohesive zones. This identification is based on careful mechanical characterization of all components of the DBC (ceramic, copper and interface) using an innovative approach based on image correlation

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Characterisation of power modules ceramic substrates for reliability aspects

Cited by 24 publications

References 7 publications

A Stress-Relieved Method Based on Bottom Pattern Design Considering Thermal and Mechanical Behavior of DBC Substrate

A Stress-Relieved Method Based on Bottom Pattern Design Considering Thermal and Mechanical Behavior of DBC Substrate

Lifetime of power electronics interconnections in accelerated test conditions: High temperature storage and thermal cycling

Characterization of materials and their interfaces in a direct bonded copper substrate for power electronics applications

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