Challenges in advanced semiconductor technology for high-performance and supercomputer applications

Abstract

This article provides a review of the capabilities, future directions, and technology challenges for semiconductor chips and packages as they apply to high-performance and supercomputer applications. Semiconductor chip technology has resulted in dramatic device density improvements over the last 20 years. Scaling theory predicts that continued improvements will be possible if the technological problems associated with patterning, doping, interconnection, density, yield, and cost can be solved. The issues associated with these challenges are discussed. Finally, the packaging needs to support advanced chip technologies are reviewed.

An analytical approach to quantify the thermal budget in consideration of consecutive thermal process steps

“…Therefore, we obtain the location of the resulting pn-junction xjo by solving equation (4) for x and setting N to the value of the substrate doping concentration, N,, as well as r = 0; the location of the pn-junction xj after a process step is obtained in the same way when tis set to the process time. The resulting shift of the pnjunction, which we define as diffusion budget DB of this process step, is then given by which relates the dopant concentration per unit volume N to the parameters diffusion timeer and distance x from the location of the maximum dopant concentration.…”

“…Hereby are the frequency factor Do and the activation energy E, two material specific parameters; ks is the Boltzmann constant and T the process temperature in K. As a consequence, following the definition given in (1) Osburn and Reisman redefined the TI3 as the process time allowed for a given process temperature [4]. However, this concept is also insufficient because only one temperature step is considered whereas usually many different temperaNreS are combined in one process sequence.…”