Challenges for Nanoscale CMOS Logic Based on Two-Dimensional Materials

Knobloch, Theresia; Selberherr, S.

doi:10.3390/nano12203548

Cited by 19 publications

(20 citation statements)

References 114 publications

(186 reference statements)

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“…[149] Researches have been undertaken in sub-10 nm regime and fabrication of 2D FETs in sub-10 and sub-5 nm still faces numerous challenges for CMOS technology. [120][121][122]150] A comparison of the experimental results of 2D-FETs in sub-10 and sub-5 nm regime is presented in Table 4.…”

Section: Yoon Et Al In 2011 Incorporated the Performance Limit Of Mosmentioning

confidence: 99%

Sub‐5 nm 2D Semiconductor‐Based Monolayer Field‐Effect Transistor: Status and Prospects

Meena

Sharma

Jogi

2023

Physica Status Solidi (a)

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The objectives of the semiconductor industry include scaling down the silicon (Si)-based devices from bulk to nanoscale, reducing the effective cost, and improving the performance of the device. [1] Semiconductor devices such as metal-oxide semiconductor field-effect transistors (MOSFETs), field-effect transistors (FETs), complementary metal oxide semiconductor (CMOS) transistors, and other semiconductor devices with different architectures and scaling properties have been analyzed according to the guidelines of International Technology Roadmap for Semiconductors (ITRS), International Roadmap for Devices and Systems (IRDS), and Nano Electronics Roadmap for Europe: Identification and Dissemination (NEREID). Moore's law, followed for subsequent scaling down of MOSFETs, FETs, and CMOS devices using 3D semiconductors (Si, gallium nitride, and gallium arsenide), has become irrelevant in the nanoregime. [2,3] Challenges such as device degradation due to short channel effects, leakage current leading to mobility degradation, and heat dissipation issues or "heat death" of conventional 3D semiconductor-based nanodimensional CMOS devices and electronic circuits are faced due to dangling bonds, surface scattering states, undesirable coupling with phonons, creation of interface states, manifestation of the leakage current, static power problem, and large subthreshold swing (SS). [4][5][6] Search for alternate channel materials has been trending in the 2D semiconductor research in order to meet the above mentioned challenges.Richard Feynman, in 1959, introduced researchers to the concept of nanodimensions (<100 nm) and nanotechnology. The semiconductor industry has come a long way since then with newly engineered nanostructures such as carbon nanotubes (CNT), quantum dots, quantum wires, and nanofibers that have led to great advancements in nanotechnology with applications in biomedicine, pharmaceuticals, cosmetics, and environmental issues. [7] Nanomaterials are usually classified into four types based on quantum confinement and the device dimensions, at least one of which is in the nanorange (from 1 to 100 nm). Different types of nanomaterials are represented in Figure 1 and are described as follows. 1) 3D nanomaterials: The nanomaterials for which all three dimensions lie outside the nanometric scale (1-100 nm) are termed as 3D materials. The electrons are free to move in all three directions and thus there is no confinement or limitation for the flow of charge carriers. The bulk 3D nanomaterials consist of bundles of nanowires, nanotubes, bulk powders, or nanoparticles and multiple nanolayers or polycrystals. 2) 2D nanomaterials. The 2D nanomaterials have only one dimension in the nanometric scale whereas the other two dimensions lie outside the nanoscale (1-100 nm). These are similar to a planar structure. The electrons can easily move in two directions and are confined in one direction, for example, nano thin films, nanocoatings, nanolayers, nanosheets, etc. for 2D quantum well systems. 3) 1D nanomaterials: These nanoma...

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Section: Yoon Et Al In 2011 Incorporated the Performance Limit Of Mosmentioning

confidence: 99%

Sub‐5 nm 2D Semiconductor‐Based Monolayer Field‐Effect Transistor: Status and Prospects

Meena

Sharma

Jogi

2023

Physica Status Solidi (a)

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“…Subsequently, by frequently folding and unfolding the tape, increasingly fewer layers remain. These layers are then transferred to a wafer, typically SiO 2 -on-silicon [ 164 , 165 ]. While significant progress has been made to refine this process, mechanical exfoliation is still inherently a random process, whereby only a small fraction of the produced flakes are suitable for testing or device integration.…”

Section: Fabrication and Working Principle Of 2d-material-based Gas S...mentioning

confidence: 99%

Application of Two-Dimensional Materials towards CMOS-Integrated Gas Sensors

Filipovic

Selberherr

2022

Nanomaterials

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During the last few decades, the microelectronics industry has actively been investigating the potential for the functional integration of semiconductor-based devices beyond digital logic and memory, which includes RF and analog circuits, biochips, and sensors, on the same chip. In the case of gas sensor integration, it is necessary that future devices can be manufactured using a fabrication technology which is also compatible with the processes applied to digital logic transistors. This will likely involve adopting the mature complementary metal oxide semiconductor (CMOS) fabrication technique or a technique which is compatible with CMOS due to the inherent low costs, scalability, and potential for mass production that this technology provides. While chemiresistive semiconductor metal oxide (SMO) gas sensors have been the principal semiconductor-based gas sensor technology investigated in the past, resulting in their eventual commercialization, they need high-temperature operation to provide sufficient energies for the surface chemical reactions essential for the molecular detection of gases in the ambient. Therefore, the integration of a microheater in a MEMS structure is a requirement, which can be quite complex. This is, therefore, undesirable and room temperature, or at least near-room temperature, solutions are readily being investigated and sought after. Room-temperature SMO operation has been achieved using UV illumination, but this further complicates CMOS integration. Recent studies suggest that two-dimensional (2D) materials may offer a solution to this problem since they have a high likelihood for integration with sophisticated CMOS fabrication while also providing a high sensitivity towards a plethora of gases of interest, even at room temperature. This review discusses many types of promising 2D materials which show high potential for integration as channel materials for digital logic field effect transistors (FETs) as well as chemiresistive and FET-based sensing films, due to the presence of a sufficiently wide band gap. This excludes graphene from this review, while recent achievements in gas sensing with graphene oxide, reduced graphene oxide, transition metal dichalcogenides (TMDs), phosphorene, and MXenes are examined.

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“…After the discovery of graphene, other 2D materials, such as silicene, germanene, molybdenum disulfide (MoS 2 ), phosphorene, arsenene, and antimonene have been realized and investigated. − In addition to their unique properties, 2D materials of group V elements, unlike graphene sheets, have an intrinsic bandgap, making them more promising candidates for future nanoelectronic devices. Recently, several theoretical studies have focused on the geometric, optical, and electronic properties of phosphorene, arsenene, antimonene, and bismuthene. − Several research groups have successfully synthesized 2D materials of group V elements using exfoliation or growth on different substrates. − The ability to synthesize these films increases their potential for a wide range of applications from electronic, optoelectronic, and spintronic devices to sensors and actuators; further potential applications include thermoelectrics, energy conservation, and storage devices. − …”

Section: Introductionmentioning

confidence: 99%

A Theoretical Study of Armchair Antimonene Nanoribbons in the Presence of Uniaxial Strain Based on First-Principles Calculations

Yazdanpanah Goharrizi,

Barzoki,

Selberherr

et al. 2023

ACS Appl. Electron. Mater.

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The optimized geometry and also the electronic and transport properties of passivated edge armchair antimonene nanoribbons (ASbNRs) are studied using ab initio calculations. Due to quantum confinement, the size of the bandgap can be modulated from 1.2 eV to 2.4 eV (indirect), when the width is reduced from 5 nm to 1 nm, respectively. This study focuses on nanoribbons with a width of 5 nm (5-ASbNR) due to its higher potential for fabrication and an acceptable bandgap for electronic applications. Applying uniaxial compressive and tensile strain results in a reduction of the bandgap of the 5-ASbNR film. The indirect to direct bandgap transition was observed, when introducing a tensile strain of more than +4%. Moreover, when a compressive strain above 9% is introduced, semi-metallic behavior can be observed. By applying compressive (tensile) strain, the hole (electron) effective mass is reduced, thereby increasing the mobility of charge carriers. The study demonstrates that the carrier mobility of ASbNR-based nanoelectronic devices can be modulated by applying tensile or compressive strain on the ribbons.

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Challenges for Nanoscale CMOS Logic Based on Two-Dimensional Materials

Cited by 19 publications

References 114 publications

Sub‐5 nm 2D Semiconductor‐Based Monolayer Field‐Effect Transistor: Status and Prospects

Sub‐5 nm 2D Semiconductor‐Based Monolayer Field‐Effect Transistor: Status and Prospects

Application of Two-Dimensional Materials towards CMOS-Integrated Gas Sensors

A Theoretical Study of Armchair Antimonene Nanoribbons in the Presence of Uniaxial Strain Based on First-Principles Calculations

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