CGMAP: a new approach to Network-on-Chip mapping problem

Abstract

Abstract:The NoC paradigm is one, if not the only one, fit to enable the integration of an exceedingly large number of computational, logical and storage blocks in a single chip. This paper presents a novel technique called CGMAP, which finds a mapping of the vertices of a task graph to the tiles of a mesh based NoC architecture. The proposed algorithm is basically a genetic algorithm, which takes the advantages of the chaotic systems by using them instead of the random processes in the GA. Experimental results show that the proposed algorithm performs as well as the previously proposed mapping algorithms considering some performance indexes such as hop distance, energy consumption, and latency ratio.

Evaluating the performance of one-dimensional chaotic maps in the network-on-chip mapping problem

“…Results made it clear that the complexity of the mapping algorithm does not change much when using different chaotic equations. As it is proved in [2], the complexity of the mapping algorithm is equal to…”

“…The Chaos-Genetic based Algorithm (CGMAP) presented in [2], seems to have the potential to achieve this goal very well. Therefore it is used as a solution for the mapping problem in this work.…”

Thermal Uniformity-Aware Application Mapping for Network-on-Chip Design

“…A multi-objective Genetic Algorithm (MOGA) based application mapping technique has been proposed in [28], where one-one as well as many-many mapping between switches and tiles have been taken into consideration to minimize energy consumption and required link bandwidth. In [29], CGMAP, a genetic algorithm based application mapping technique has been proposed that uses the chaotic mapping operator instead of the random processes in GA. GAMR [30], a genetic algorithm based mapping and routing approach addresses a two phase mapping of IP cores onto NoC architecture and generates a deterministic dead-lock free minimal routing path for each communication to minimize the total communication energy and maximum link bandwidth of the NoC architecture. GBMAP, an evolutionary approach for mapping cores onto NoC architecture has been proposed in [31], which reduces energy consumption and total bandwidth requirement of NoC.…”

Method for NoC Bottleneck Relaxation Using Proxy

“…시간을 증가시키고 이에 따른 동기화 문제가 발생하게 된다 [5,6]. 이외에도 공유버스 구조는 IP 수의 증가에 따른 여러 가지 문제점들로 인해 시스템의 확장성과 성능향상에 제한 을 받게 된다 [7,8].…”