Cell-based high-frequency IC design in scaled CMOS

Abstract

This paper presents a cell-based modeling and design platform for high-frequency analog ICs to shorten design cycle time and to minimize the risk for mask re-spin. Based on a pre-characterized analog sub-circuit cell library, which contains not only active devices and passive components but also routing interconnects. This methodology systematically alleviates modeling inaccuracy at high frequencies due to the difference in the layout between device test structures and actual circuit implementation. By exploiting the modularity in analog circuits at the sub-circuit level, the proposed design platform achieves a balance between design flexibility and modeling accuracy compared. The macro modeling techniques the sub-circuit cells will be described along with measurement results from a characterization test chip.