CD-TEM: Characterizing impact of TEM sample preparation on CD metrology

Kenslea, Anne; Hakala, Chris; Zhong, Ziyang; Lu, Ying-Gang; Fretwell, J.; Hager, J.; Kang, Chris; Tan, Haiyan; Weng, Wen Jian; Dumas, Laurent; Brooks, Irene

doi:10.1109/asmc.2018.8373170

Cited by 10 publications

(9 citation statements)

References 5 publications

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“…Recently, automated focused ion beam (FIB) combined with STEM have been developed to extract site specific ultra-thin samples for reference metrology in an implementation referred to as CD-TEM 103 , and are also used for TEM tomography, allowing 3D measurements. Work is underway to use the same type of automated FIB capabilities to fabricate on-demand functionalized critical dimension atomic force microscopy (CD-AFM) tips, and evaluate them in the TEM.…”

Section: Advanced Metrology Techniquesmentioning

confidence: 99%

“… * In-line means that it could be used inside a semiconductor manufacturing fabrication (“fab”) environment. # TEM is increasingly being optimized for use in the fab, see ref. 103 . SNR, signal to noise ratio; EM, electro-magnetic; Scatterometry information after ref.…”

Section: Figure 1 ∣mentioning

confidence: 99%

“… # TEM is increasingly being optimized for use in the fab, see ref. 103 . SNR, signal to noise ratio; EM, electro-magnetic; Scatterometry information after ref.…”

Section: Figure 1 ∣mentioning

confidence: 99%

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Metrology for the next generation of semiconductor devices

Badaroglu²,

et al. 2018

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The semiconductor industry continues to produce ever smaller devices that are ever more complex in shape and contain ever more types of materials. The ultimate sizes and functionality of these new devices will be affected by fundamental and engineering limits such as heat dissipation, carrier mobility and fault tolerance thresholds. At present, it is unclear which are the best measurement methods needed to evaluate the nanometre-scale features of such devices and how the fundamental limits will affect the required metrology. Here, we review state-of-the-art dimensional metrology methods for integrated circuits, considering the advantages, limitations and potential improvements of the various approaches. We describe how integrated circuit device design and industry requirements will affect lithography options and consequently metrology requirements. We also discuss potentially powerful emerging technologies and highlight measurement problems that at present have no obvious solution.

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Section: Advanced Metrology Techniquesmentioning

confidence: 99%

Section: Figure 1 ∣mentioning

confidence: 99%

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Metrology for the next generation of semiconductor devices

Badaroglu²,

et al. 2018

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“…238 Continual improvements in TEM workflow automation and quality control have enabled CD-TEM to be used as a complementary near-line metrology method, allowing large-scale process monitoring of 3D structures via direct measurement for the first time. 239 This process is reliant upon sample preparation and for effective characterization the sample thickness must be optimized during sectioning to isolate the feature of interest without capturing neighboring devices. CW lasers have been combined with TEM to achieve attosecond time resolution of spectroscopic features.…”

Section: Ltemmentioning

confidence: 99%

Review of THz-based semiconductor assurance

True

Jessurun

et al. 2021

Opt. Eng.

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Terahertz radiation for inspection and fault detection has been of interest for the semiconductor industry since the first generation and detection of THz signals. Until recent hardware advances, THz systems lacked the signal quality and reliability for use as an effective nondestructive testing (NDT) method. Incremental advances in THz sources, detectors, and signal processing resulted in the successful applied-industrial use of THz NDT techniques on carbon fiber laminates, automotive coatings, and for detection of counterfeit pharmaceutical tablets. Semiconductor inspection and verification methods ensure the functionality and thereby safety of vital electronics for several critical industries. For this reason, the reliability and verification of a THz NDT method must exceed currently used inspection systems. With recent laboratory access to THz radiation, THz inspection methods are often compared with existing optical, electrical, and volumetric semiconductor verification techniques for their production monitoring and failure analysis viability. This review will cover THz techniques and their applications at the printed circuit board (PCB), integrated circuit (IC), and transistor/gate scales. The THz radiation gap spans between optical and electronic ranges with a millimeter-sized wavelength allowing for adequate penetration of plastic and ceramic and semiconductor materials. THz radiation can be used to determine structural features, electrical signatures in the THz range, and chemical information simultaneously. Cost and environmental limitations restricted the ability for THz NDT semiconductor inspection methods to escape the lab and succeed in the dynamic environment of a semiconductor fabrication environment. Hybridized metrology methods incorporating information from multiple inspection tools are a regime where THz spectral and structural data can be combined with existing methods such as optical, x-ray, or E-beam. THz can be used initially to offer support to the complex failure analysis and verification requirements of the semiconductor industry from nanoscale to macroscale features and components. For THz systems to become independent inspection tools used for semiconductor production monitoring, in the lab or fab, this will require a confident level of statistical process control for THz signal generation, detection, or processing. Applied industrial semiconductor device inspection will likely be a result of a combination of research into THz hardware, reconstruction techniques, and the widespread application of machine learning techniques. Many breakthroughs occurred over the years to enable successful nondestructive characterization and inspection of semiconductor devices from the nanoscale transistors to fully packaged integrated circuits and assembled PCBs.

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“…Recently, commercial automation equipment for TEM lamella prep and TEM imaging became available. [1,2] While such a toolset facilitates automation for TEM critical dimension (CD) applications, [3] automating TEM lamella prep on defect locations remains difficult due to the following challenges. First, although FIB-SEM has SEM imaging capability, its hardware and software are not necessarily designed for defect (re-)detection: FIB-SEM often cannot 'see' inline defect as good as inline SEM which is optimized for defect detection.…”

Section: Introductionmentioning

confidence: 99%

Automated TEM Workflow for Inline Defect Characterization

Shim

Lee

Kwon

2021

International Symposium for Testing and Failure Analysis

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This study demonstrates that a high-volume TEM workflow can be achieved for inline defect characterization by adding a defect marking step using commercially available tools. A simple user-assisted defect marking step added to a conventional automated ex-situ lift-out TEM workflow showed 2.9 times faster throughput using 11 times less man-hours, a significant productivity gain over a conventional manual TEM workflow.

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CD-TEM: Characterizing impact of TEM sample preparation on CD metrology

Cited by 10 publications

References 5 publications

Metrology for the next generation of semiconductor devices

Metrology for the next generation of semiconductor devices

Review of THz-based semiconductor assurance

Automated TEM Workflow for Inline Defect Characterization

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