Cascading CMOS-Based Chaotic Maps for Improved Performance and Its Application in Efficient RNG Design

Abstract

We present a general framework for improving the chaotic properties of CMOS-based chaotic maps by cascading multiple maps in series. Along with two novel chaotic map topologies, we present the 45 nm designs for four CMOS-based discrete-time chaotic map topologies. With the help of the bifurcation plot and three established entropy measures, namely, Lyapunov exponent, Kolmogorov entropy, and correlation coefficient, we present an extensive chaotic performance analysis on eight unique map circuits (two under each topology) to show that under certain constraints, the cascading scheme can significantly elevate the chaotic performance. The improved chaotic entropy benefits many security applications and is demonstrated using a novel random number generator (RNG) design. Unlike conventional mathematical chaotic map-based digital pseudo-random number generators (PRNG), this proposed design is not completely deterministic due to the high susceptibility of the core analog circuit to inevitable noise that renders this design closer to a true random number generator (TRNG). By leveraging the improved chaotic performance of the transistor-level cascaded maps, significantly low area and power overhead are achieved in the RNG design. The cryptographic applicability of the RNG is verified as the generated random sequences pass four standard statistical tests namely, NIST, FIPS, Diehard, and TestU01.

A 2D Chaotic Oscillator for Analog IC

“…The seed maps perform the non-linear mapping operation of f X and f Y , as shown in ( 1) and ( 2). The 45 nm Cadence designs of the chaotic maps are done according to the topologies proposed in [1]. Figure 3 (d-f) shows the transfer characteristics of three seed maps at different control voltage (V c ) values.…”

“…RNG STRUCTURE Figure 12 shows the schematic of the RNG. The core architecture of this RNG was presented in [1]. Each of the four comparators in the RNG architecture compares between the outputs from two 2D chaotic oscillators.…”

“…For example, X − I comes from 2D−I and CX−I comes from another 2D−I that is configured in a cascaded way, as shown in Figure 13. In the cascaded configuration, two copies of the same seed map are connected in series to harvest more chaotic entropy [1].…”

“…T HE BEHAVIOR of a non-linear dynamic system is referred to as chaotic when the system responds aperiodically and shows extreme sensitivity to even an infinitesimal change in the initial state [1]. Unlike the random aperiodicity of stochastic systems, the aperiodicity of chaotic systems is deterministic, implying that, given the same system parameters, an identical aperiodic sequence is reproducible.…”

A Unified NVRAM and TRNG in Standard CMOS Technology

“…The secure system typically implements a standalone TRNG, exploiting the different physical phenomena to obtain random numbers. For example, entropy sources based on a chaotic system [20]- [22], charge trapping in FinFet [23], the frequency collapse in multimodal ring oscillator [24]- [26], and metastability in latches [27]- [30]. However, the new approaches unified the TRNG with the memories used in the system, reducing the area overhead.…”