Carrier Transport Mechanisms Underlying the Bidirectional &lt;inline-formula&gt; 
                     &lt;tex-math notation="LaTeX"&gt;${V}_{\mathrm{{TH}}}$ &lt;/tex-math&gt;
                  &lt;/inline-formula&gt; Shift in p-GaN Gate HEMTs Under Forward Gate Stress

Shi, Yuanyuan; Zhou, Qi; Qian, Cheng; Wei, Pengcheng; Zhu, Liyang; Wei, Dong; Zhang, Anbang; Chen, Wanjun; Zhang, Chao

doi:10.1109/ted.2018.2883573

Cited by 60 publications

(14 citation statements)

References 27 publications

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“…In details, the first platform in the gate leakage curve, i.e. Region I, should be a result of the preliminary electron-tunneling process [36]. While as the V GS increases (over 0.5 V), 2DEG is accumulated in the channel, electron trapping as accelerated by positive bias then leads to the steep increase in the gate leakage (Region II).…”

Section: Resultsmentioning

confidence: 99%

Current transport dynamics and stability characteristics of the NiO _x based gate structure for normally-off GaN HEMTs

Du¹,

Xu²,

Gong³

et al. 2022

J. Phys. D: Appl. Phys.

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The application of p-type oxide typified with NiOx as cap layer in AlGaN/GaN HEMT for normally-off operation has specific benefits, including etching free fabrication process, high hole density and elimination of Mg dopants diffusion effects. This work presents a device configuration exploration combining the p-NiOx gate cap layer and a thin AlGaN barrier layer. Calculation method for the threshold voltage has been discussed, which obtains good consistence with the experimental measurements. In addition, a nitrogen based post-annealing process was developed to improve the film stoichiometry for elevated gate controllability, realizing normally-off operation with enhanced channel conduction capability. The current transport dynamics in the gate stack as coupled with the NiOx/AlGaN interface states have also been studied, where a deep level trap was recognized in dominating the gate current characteristics and the gate stability performance under different forward gate bias conditions.

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Section: Resultsmentioning

confidence: 99%

Current transport dynamics and stability characteristics of the NiO _x based gate structure for normally-off GaN HEMTs

Du¹,

Xu²,

Gong³

et al. 2022

J. Phys. D: Appl. Phys.

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“…EVERAL studies are present in the literature that involve the investigation of the stability of normally-off p-GaN high electron mobility transistors (HEMTs) after applying gate bias stress [1]- [9]. These studies mostly focus on the instability of the threshold voltage (VT) [2], [4]- [10] caused by dynamic effects occurring at (or near) the device region under the gate [11].…”

Section: Introductionmentioning

confidence: 99%

Gate-Bias Induced R_ON Instability in p-GaN Power HEMTs

Chini

Zagni

Verzellesi

et al. 2023

IEEE Electron Device Lett.

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In this letter, we investigate the on-resistance (RON) instability in p-GaN power HEMTs induced by a positive or negative gate bias (VGB), following the application of a quasi-static initialization voltage (VGP) of opposite sign. The transient behavior of this instability was characterized at different temperatures in the 90-135 °C range. By monitoring the resulting drain current transients, the activation energy as well as time constants of the processes are characterized. Not trivially, both RON increase/decrease were found to be thermally activated and with same activation energy. We attribute the thermal activation of both RON increase/decrease to the charging/discharging of hole traps present in the AlGaN barrier in the region below the gate.

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“…The p-GaN gate GaN HEMTs are ideally suited for use as enhancement-mode (E-mode) transistors because of their excellent threshold voltage (V TH ) control capabilities and require a positive V TH above 1.5 V to turn on the device [ 4 , 5 , 6 ]. However, V TH instabilities of p-GaN gate GaN HEMTs have been reported and discussed [ 7 , 8 , 9 ]. The V TH shift is due to several complex reasons, including acceptor-like traps in p-GaN [ 10 , 11 ], p-GaN gate sidewall leakage [ 12 , 13 , 14 ], low Schottky barrier heights [ 10 ], etc.…”

Section: Introductionmentioning

confidence: 99%

Improving the High-Temperature Gate Bias Instabilities by a Low Thermal Budget Gate-First Process in p-GaN Gate HEMTs

et al. 2023

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In this study, we report a low ohmic contact resistance process on a 650 V E-mode p-GaN gate HEMT structure. An amorphous silicon (a-Si) assisted layer was inserted in between the ohmic contact and GaN. The fabricated device exhibits a lower contact resistance of about 0.6 Ω-mm after annealing at 550 °C. In addition, the threshold voltage shifting of the device was reduced from −0.85 V to −0.74 V after applying a high gate bias stress at 150 °C for 10−2 s. The measured time to failure (TTF) of the device shows that a low thermal budget process can improve the device’s reliability. A 100-fold improvement in HTGB TTF was clearly demonstrated. The study shows a viable method for CMOS-compatible GaN power device fabrication.

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Carrier Transport Mechanisms Underlying the Bidirectional <inline-formula> <tex-math notation="LaTeX">${V}_{\mathrm{{TH}}}$ </tex-math> </inline-formula> Shift in p-GaN Gate HEMTs Under Forward Gate Stress

Cited by 60 publications

References 27 publications

Current transport dynamics and stability characteristics of the NiO _x based gate structure for normally-off GaN HEMTs

Current transport dynamics and stability characteristics of the NiO _x based gate structure for normally-off GaN HEMTs

Gate-Bias Induced R_ON Instability in p-GaN Power HEMTs

Improving the High-Temperature Gate Bias Instabilities by a Low Thermal Budget Gate-First Process in p-GaN Gate HEMTs

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Carrier Transport Mechanisms Underlying the Bidirectional <inline-formula> <tex-math notation="LaTeX">${V}_{\mathrm{{TH}}}$ </tex-math> </inline-formula> Shift in p-GaN Gate HEMTs Under Forward Gate Stress

Cited by 60 publications

References 27 publications

Current transport dynamics and stability characteristics of the NiO x based gate structure for normally-off GaN HEMTs

Current transport dynamics and stability characteristics of the NiO x based gate structure for normally-off GaN HEMTs

Gate-Bias Induced RON Instability in p-GaN Power HEMTs

Improving the High-Temperature Gate Bias Instabilities by a Low Thermal Budget Gate-First Process in p-GaN Gate HEMTs

Contact Info

Product

Resources

About

Current transport dynamics and stability characteristics of the NiO _x based gate structure for normally-off GaN HEMTs

Current transport dynamics and stability characteristics of the NiO _x based gate structure for normally-off GaN HEMTs

Gate-Bias Induced R_ON Instability in p-GaN Power HEMTs