2022
DOI: 10.1021/acsphotonics.2c01194
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Capturing the Effects of Spatial Process Variations in Silicon Photonic Circuits

Abstract: Silicon photonic devices are very sensitive to process variation, and it is important for circuit designers that they can predict the effect of this variability during the design phase, and optimize their design for both performance and yield. This requires an accurate predictive model of the spatial variations induced by the fabrication process. We present in this paper a method to extract a granular map of the line width and thickness variation on a silicon photonics wafer. We propose a hierarchical model to… Show more

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Cited by 29 publications
(22 citation statements)
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“…According to the experimental data presented in [ 35 ], the intra-wafer standard deviation of the waveguide width for the typical SOI fabrication process based on 248 nm photolithography is about 3.9 nm. In the commercially available state-of-the-art 193 nm immersion lithography and dry etch fabrication process, the intra-wafer waveguide width standard deviation can be as low as 2.5 nm [ 50 ]. However, according to [ 51 ], for different wafers, the standard deviation of waveguide width can reach 6.4 nm.…”
Section: Discussionmentioning
confidence: 99%
“…According to the experimental data presented in [ 35 ], the intra-wafer standard deviation of the waveguide width for the typical SOI fabrication process based on 248 nm photolithography is about 3.9 nm. In the commercially available state-of-the-art 193 nm immersion lithography and dry etch fabrication process, the intra-wafer waveguide width standard deviation can be as low as 2.5 nm [ 50 ]. However, according to [ 51 ], for different wafers, the standard deviation of waveguide width can reach 6.4 nm.…”
Section: Discussionmentioning
confidence: 99%
“…One of the major challenges in large-scale photonic circuits is the sensitivity of on-chip waveguides to small variations in the fabricated geometry. 48 Even nanometer-scale deviations of the waveguide width and thickness can give rise to unacceptable behavior of the circuit, and this problem becomes more prominent as the circuits become larger. Programmable circuits can actually help in addressing this because the built-in electro-optic actuators can be used to compensate for many of the fabrication variations.…”
Section: Variability Imperfections and Lossesmentioning
confidence: 99%
“…3 and pessimistically adding it to the expected FSR variation, we expect a nominal 𝜆 ag of 133.33 GHz to accommodate a yield of 6𝜎. This yield estimate is calculated assuming that resonators within the same chip will be highly correlated in their FSR performance [23,27].…”
Section: Aggressor Spacing Reduction Due To Fsr Errormentioning
confidence: 99%