Calibration of DAC Mismatch Errors in $\Sigma\Delta$  ADCs Based on a Sine-Wave Measurement

Bock, Maarten De; Xing, Xinpeng; Weyten, L.; Gielen, Georges; Rombouts, Pieter

doi:10.1109/tcsii.2013.2268413

Cited by 34 publications

(12 citation statements)

References 18 publications

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“…5. When ETF 1 is approximated as a constant (0.83 = -1.62 dB) like in [20] and [22], the calibrated spectrum, with the correct DAC mismatch values, is shown in Fig. 5(a).…”

Section: A Error Transfer Functionmentioning

confidence: 99%

“…Since ETF 1 in reality is not exactly a constant, as shown in Fig. 4, the output spectrum V cal can not perfectly be reconstructed and has large distortions, which was also observed in [20] and [22]. Doing the calibration with the actual ETF 1 and the exact mismatch values of DAC 1 , the ideal output spectrum is obtained, as shown in Fig.…”

Section: A Error Transfer Functionmentioning

confidence: 99%

“…There are two families of digital calibration techniques. In the first family, the correction terms are obtained in an offline calibration cycle [20]- [22], while in the second family the correction terms are continuously updated online by some continuous adaptation technique [23]- [25]. This work focuses on offline calibration techniques, which have the advantage that no modification at all of the analog modulator core is needed and that they can also be used for debug and evaluation purposes.…”

Section: Introductionmentioning

confidence: 99%

“…This work focuses on offline calibration techniques, which have the advantage that no modification at all of the analog modulator core is needed and that they can also be used for debug and evaluation purposes. When looking at related prior art, the time-domain techniques [20], [21] suffer from the fact that a high-quality low-jitter low-distortion signal generator is required for the calibration. In [22], an alternative frequency-domain method has been demonstrated, without the need of a high-quality signal generator.…”

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Efficient Offline Outer/Inner DAC Mismatch Calibration in Wideband ΔΣ ADCs

Liu

Rombouts

Gielen

2020

IEEE Trans. Circuits Syst. I

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Distortion due to feedback DAC mismatch is a key limitation in ∆Σ ADCs for wideband wireless communications. This paper presents an efficient frequency-domain mask-based offline mismatch calibration method of both the outer DAC and the inner DACs in a ∆Σ ADC. The test stimulus for the calibration is a two-tone signal near the band edge. To avoid the need for high-performance signal generation, a frequency mask is applied to void the stimulus signal and its phase noise. In this way, the method is robust against distortion and jitter in the stimulus signal, which therefore could be combined from two lowquality signal generators. The two-tone band-edge signal has the additional benefit that the number of needed samples of the excitation signal is very modest because as many intermodulations as possible contribute to the calculation of the mismatch errors of the DACs. Experimental results confirming the calibration method are obtained from a prototype chip, designed for an 85MHz signal bandwidth in 28nm CMOS technology. A two-tone stimulus around 78 MHz is applied to calculate the mismatch of the outer DAC and the inner DAC with only 68K samples. With the DACs calibrated, an SFDR improvement of 28.1 dB is achieved for a single-tone input at 5 MHz, while for a twotone input around 71 MHz, the IM3 is improved from -63.6 dBc to below the noise floor (<-94.1 dBc). This illustrates the effectiveness of the approach.

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“…5. When ETF 1 is approximated as a constant (0.83 = -1.62 dB) like in [20] and [22], the calibrated spectrum, with the correct DAC mismatch values, is shown in Fig. 5(a).…”

Section: A Error Transfer Functionmentioning

confidence: 99%

Section: A Error Transfer Functionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Efficient Offline Outer/Inner DAC Mismatch Calibration in Wideband ΔΣ ADCs

Liu

Rombouts

Gielen

2020

IEEE Trans. Circuits Syst. I

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“…Implementation considerations: The proposed structure has a VCO input stage and as such it is directly affected by the VCO's nonlinearity. However, there are several ways to solve this problem, including PWM pre-coding [4,5] and post calibration [6].…”

mentioning

confidence: 99%

True high‐order VCO‐based ADC

Babaie-Fishani

Rombouts

2015

Electron. lett.

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In this brief, we present a novel approach to use a VCO as the first integrator of a high order continuous time Delta Sigma Modulator. In the proposed architecture, the VCO is combined with a digital up-down counter to implement the first integrator of the continuous time Delta Sigma Modulator. This way, the first integrator is digital friendly and hence can maximally benefit from technological scaling.Introduction: In most cases, in Continuous Time Delta Sigma Modulators (CT-DSMs) the first integrator is the bottle neck in terms of power consumption and noise. In deep-submicrometer processes, this block is becoming more and more difficult to implement in the voltage-domain due to the limited voltage headroom and gain of narrow channel transistors. For this reason, there is an increasing interest in VCO-based ADCs. Here, an integrator is based on a voltage controlled oscillator (VCO) which is typically implemented as a ring oscillator. Such a ring oscillator consists of a loop of inverters controlled by a current-mode or voltage-mode signal. Therefore they are a very good option for digital friendly technologies. One of the main issues with current VCO-ADCs with a VCO input stage is that they can only provide 1st order noise shaping. There have been a few attempts to increase the order by using multi-loop mash approaches [1, 2], but these techniques are very sensitive to analog imperfections [1].A notable attempt to obtain a single-loop high-order VCO ADC which uses a VCO as the first integrator is [3]. However, this approach suffers from a high complexity and power consumption, and additionally it has high sensitivity to the center frequency of the VCO which makes this idea impractical. In this work, we will construct an alternative, very general technique for high-order ADC's with a VCO input stage and indicate how its simplest form can be implemented by adding a well established Phase Frequency Detector (PFD).

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Design and implementation of a fully differential 2nd‐order CIFF DSM with the synthetic techniques of novel CDS chopper‐integrator and DER using additive‐error capacitors

Geng,

Wang,

Zhang

et al. 2024

Circuit Theory & Apps

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SummaryCompared to the independent application of chopper stabilization or correlated double sampling (CDS), this paper proposed a 2nd‐order cascade of integrators with feedforward delta–sigma modulator (DSM) utilizing an innovatively synthetic technique of chopper‐integrator within CDS at 1st stage for reducing the flicker noise and DC offset cancelation from about 9.5 mV to −4.4 μV ± 115.6 μV (δ). On the regard of further enhancing the noise suppression and mitigating the nonlinearities of capacitor mismatch, instead of applying the dynamic elements randomization (DER) to the nonlinear correction of DAC under multi‐bits quantizer, here the operation of 3‐bits DER with scrambler has been intelligently employed on the 2nd integrators' sampling capacitors to gain the 2nd noise‐shaping characteristic in spite of 1‐bit quantizer. The noise floor could be theoretically scaled down by −16.1 dB at input frequency of 10 kHz within the limited bandwidth of 100 kHz. The prototype DSM was manufactured in 180‐nm BCD process with an active area of 0.2625 mm2 and achieves the SNDR‐based Schreier figure‐of‐merit (FoMS) of 144 dB and Walden figure‐of‐merit (FoMW) of 25.96 pJ/conv under a 3.3 V supply at 10 kHz working frequency.

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Calibration of DAC Mismatch Errors in $\Sigma\Delta$ ADCs Based on a Sine-Wave Measurement

Cited by 34 publications

References 18 publications

Efficient Offline Outer/Inner DAC Mismatch Calibration in Wideband ΔΣ ADCs

Efficient Offline Outer/Inner DAC Mismatch Calibration in Wideband ΔΣ ADCs

True high‐order VCO‐based ADC

Design and implementation of a fully differential 2nd‐order CIFF DSM with the synthetic techniques of novel CDS chopper‐integrator and DER using additive‐error capacitors

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